xftl

Section: User Commands (1)
Updated: 10 Sep 2001
Index

NAME

xftl - synthesizable look-up table generator for xfl-based fuzzy systems

SYNOPSIS

xftl [ -O opsfile ] [ -w ] [ -o outprefix ] [ -t ftype ] [ -b bitsize ] [ -v var:bitsize ] [ -E[c|p|s] ] [ -C[s|x] ] -N[f|s] ] [ -F[l|m|h] ] [ -M[s|m|n] ] [ -P ] [ -T ] [ -B ] [ -R ] [ -H ] [ -D devicename ] xflfile

DESCRIPTION

xftl takes an xfl file and produces a C program which (once compiled) is able to generate a boolean function definition that implements the behavior of the fuzzy system. The boolean definition is generated using Brekeley PLA format. This permits the use of widely available tools for further minimization and implementation of the results. Depending on the mode of execution, xftl is able to generate the C source file, build the boolean definition on Berkeley PLA format and direct Synopsys to synthesize it on a Xilinx FPGA.

The only requirement that the C output file generated by xftl imposes is that it must be compiled using the libm.a library, since it uses specific mathematical functions.

OPTIONS

-E: Selects the mode of execution: c builds only the C source for the table look-up generation program, with suffix "Pla.c". This file should be later compiled and will produce the definiton in PLA format on its standard output. p builds the PLA definition file, which has the suffix ".pla". In this mode, xftl will also show the results as they are generated on its standard output. This is the default mode of execution. s builds the PLA definition file and execute the synthesis process on it.

C and PLA generation options

These options allow the configuration of the C source and PLA files generation, defining how these outputs are derived from the xfl description.

-O opsfile: Use opsfile as the fuzzy operations file (see xfc(1) for more details).
-w: Suppresses the printing of warning messages on stderr.
-o outprefix: Use outprefix as the prefix for the output file. This prefix is prepended to the suffixes described below to produce the names of the output files. Any valid path component can be used. The default value is "./a.xf".
-t ftype: Use ftype as the type of fuzzy variables within the output file. Any valid C type identifier can be used as value, since the value of this option is used in a "typedef FUZZY ftype" construct. The default value is "double".
-b bitsize: Set bitsize as the default number of bits for all the variables defined for the system. This option overrides the automatic bitsize assignment, which derives the bitsize for each variable from the cardinality, either explicit or implicit, defined for its type in the xfl source file.
-v var:bitsize: Set bitsize as the number of bits for variable var, instead of the general values defined automatically or by means of the -b option.

Synthesis options

Synthesis is driven by a file with suffix ".pgs", specifically tailored for the use of Synopsys and the implementation on a Xilinx FPGA. These options allow the configuration of the contents of the script file and the behavior of xftl when the PLA definition file has been generated.

-C: Selects the synthesis tool to be called: s directs the use of the Synopsys design compiler [dc_shell]. x directs the use of the Synopsys FPGA compiler [fpga_shell] (which is the default synthesis tool).
-N: Deactivates logic optimizations in the synthesis tool. f deactivates flattening (options -F , -M and -P do not apply), while s deactivates structuring (options -T and -B do not apply).
-F: Defines the flattening effort to be used by the synthesis tool: l selects low effort. m selects medium effort (which is the default). h selects high effort.
-M: Defines the type of minimization to be performed by the synthesis tool: s selects single-output minimization. m selects multiple-output minimization. n selects no minimization (which is the default).
-P: Directs the synthesis tool to invert the phase of design signals.
-T: Directs the synthesis tool to omit timing-driven structuring.
-B: Directs the synthesis tool to omit boolean optimization techniques.
-R: Directs the Xilinx tools to perform place and route for the design.
-H: Directs the synthesis tool to perform removal of block names, allowing more flexibility to the place and route process.
-D devicename: Selects devicename as the FPGA device on which the fuzzy system is going to be implemented. By default, the 4005XL-1-PC84 is used.

ENVIRONMENT

FSCCOMPILER: Defines the C compiler to be used for producing the executable file that generates the PLA description. Defaults to "cc" if not set.

FILES

The execution of xftl generates files with the following suffixes:

"Pla.c": Containing the C source code for the PLA description generation program.
".pla": Containing the table look-up synthesized in Berkeley PLA format.
".pgs": This is a script file with the necessary instructions for Synopsys to synthesize the PLA description of the fuzzy system.

EXAMPLES

The following command would produce on its standard output the boolean function description for the fuzzy system defined in "func.xfl":

xftl -Ec func.xfl; cc -o func-bool a.xfPla.c -lm; func-bool

The following command would produce the file "func.pla" with the PLA definition of the table look-up synthesized from "func.xfl":

xftl -o func func.xfl

And the following command would synthesize on a 4013BG225-4 FPGA the fuzzy system described by "func.xfl", using "func" as the output file prefix, with 4 bits per variable:

xftl -o func -b 4 -Es -D 4013BG225-4 func.xfl