Computational imaging for early acceleration of deep learning inference schemes applied to video analytics
@ Instituto de Microelectrónica de Sevilla (CSIC-Universidad de Sevilla), Spain
This project aims at the implementation of a compact ultra-low-power embedded vision system for visual inference based on deep learning. The underlying motivation is the emergence of deep learning as an end-to-end approach based on learned multi-level scene representations. In this scenario of innovation and rapid development, the embedded vision community strives to catch up by leveraging different flavours of off-the-shelf processors available in the market: DSPs, GP-GPUs, FPGAs, etc. However, when it comes to the design and implementation of embedded vision systems, image sensing is considered as a separate stage in virtually all cases. One of the most valuable features of CMOS technologies is the possibility of integrating sensing and processing on a chip. The primary goal of this project is to break this status quo by proving that monolithic sensing-processing – i.e. computational imagers − can lead to substantial performance boosting in embedded vision systems in terms of form factor, power consumption and throughput.
Alberto completed his Bachelor’s and Master’s Degrees at Universidad de Zaragoza specializing in the field of digital electronics. He participated in different projects from fluid dynamics simulation, to control theory or wireless telecommunications. He is interested in machine learning algorithms besides all RTL related topics, including High-Level Synthesis, Networks-on-Chip and dynamic reconfiguration.