Development of smart, low power CMOS Image Sensors (CIS)
@ IMASENIC: Advanced Imaging SL, Barcelona, Spain
The continuous shrinking of feature size in CMOS allowed smaller and smaller pixels in consumer cameras, thus enabling the megapixel race. We can now leverage advanced technologies to implement processing features within the pixel, while preserving high spatial resolution. Progress in high-speed or time-of-flight imaging make possible the recording of depth information within the focal plane. The first goal is to implement a high-level description of the desired functions and evaluate enabling architectures, both at pixel and sensor level. The second goal would then be the design of the selected pixel, using both TCAD and CAD modelling. The third objective of this project will be the design of the other blocks in the data path: the A/D converter, digital processing blocks, implementing further feature extraction and data reduction. The fourth and final goal of this project is the definition of the overall sensor architecture, its implementation in a sensor and the characterisation of this latter after fabrication.
Application deadline: Mar. 1, 2018