As it is widely known, current society is based in Information and Communication Technology, security being an essential issue, even considered as a fundamental right of people and institutions. “Secure” electronic devices (and every electronic device working with sensitive or relevant information must be), use cryptography to ensure private data security, confidentiality and inviolability. These “secure” electronic systems make use of cryptographic devices implementing secure algorithms to conceal, at least theoretically, stored information. Unfortunately, even when all the measures are taken to provide security, electronic devices can still leak some information due to its physic implementation whether they are victim of side-channel attacks. For this reason is a real must to be extremely careful with physic implementations of cryptographic devices, in order to minimize the effects of side-channel attacks. The aim of this project is the design and implementation of high-performance hardware implementations (ASICs) through nanometric CMOS technologies to fulfill the security requirements of (de)ciphering in portable systems. To achieve low power and high performance capabilities, stream ciphers will be used for securely encoding/decoding the information, owing to the fact that they can implement the necessary operations at an acceptable speed and with few resources without compromising on security (lightweight cryptography).
Weaknesses will be analysed and security measured for stream ciphers like Trivium, Grain or Mickey, since they are the more interesting ones for hardware implementations. Different power consumption based passive attacks will be considered (DPA) as well as fault-injection based active attacks (clock signals, power supply, temperature, pulsed laser) and combinations of both of them. Countermeasures will be proposed at any design level (architecture, circuit, layout). Optimized hardware solutions will be implemented in terms of design (area, speed, power consumption) in addition to side-attacks security. On account of considering different and key factors altogether it will be possible to optimize systems performance whilst increasing security.
Three are the main targets of the Project:
• To explore the weaknesses of stream ciphers against active and passive side-channel attacks through sistematic methodologies so as to obtain an efficient metric of the security.
• To develop architectural, circuit and layout level countermeasures for these attacks when appear isolated or, moreover, applied together.
• To design, implement and test nanometric CMOS ASIC demonstrators covering every characteristic of secure encoding/decoding and establish a metric for these figures.