** Program **

Program

Abstracts of Papers

Wednesday, November 21

9.00 - 10:00 - Welcome & Plenary Lecture I

Modeling and Design Tools for the Nanoelectronics
Paolo Lugli, Institute for Nanoelectronics, Technische Universität München, Germany
Introduced by Ángel Rodríguez-Vázquez, ANAFOCUS

10:30 - 11:50

SESSION 1A: TIMMING ANALYSIS & MODELING

Chairs:
Joan Figueras, U. Politécnica Cataluña, Spain
Eduardo de la Torre, U. Politécnica Madrid, Spain

1A.1. Timing Analysis with Compact Variation-Aware Standard Cell Models
Seyed-Abdollah Aftabjahani, Linda Milor
Georgia Institute of Technology, USA

1A.2. Voltage Fluctuations in IC Power Supply Distribution Networks: Impact on Digital Processing Sys­tems
Dennis Andrade, Ferran Martorell, Francesc Moll, Antonio Rubio
Technical University of Catalonia (UPC), Spain

1A.3. Delay Propagation of a CMOS Inverter Using the Nexp Transistor Model
Pedro Pereira, Helena Fino
New University of Lisbon, Portugal

1A.4. Measuring Changes in Energy Consumption due to Crosstalk Coupling in VLSI
Jesús Sánchez¹, José Miguel Gil-García¹, José Antonio Sainz¹, Francesc Moll², Miquel Roca³, Eugeni Isern³
1 University of Pais Vasco, Spain
2 Technical University of Catalonia (UPC), Spain
3 Universitat de les Illes Balears, Spain

 

SESSION 1B: DATA CONVERTERS I

Chairs:
Fernando Medeiro, ANAFOCUS, Spain
Eduardo Peralías, IMSE-CNM-CSIC, Spain

1B.1. Resonation-based Cascade SD Modulators for High-Linearity Broadband A/D Conversion
Alonso Morgado, Rocío del Río, José M. de la Rosa
IMSE-CNM (CSIC/Universidad de Sevilla), Spain

1B.2. Reconfigurable ADC for a GPS/Galileo RF Front-end IC
Santiago Urquijo, Guenter Rohmer
Fraunhofer IIS, Germany

IB.3. A Pixel Level, Ultra Low Power, 10Msample/s Double Ramp A/D Converter for Monolithic Active Pixel Sensors in High Energy Physics and Biomedical Imaging Applications
Nicolas Pillet, Sebastien Heini, Yann Hu
Institut Pluridisciplinaire Hubert-Curien, CNRS/ULP, France

IB.4. Low-Area, Low-Power Parallel ADCs Obtained by Using Low-Precision Comparators
António Couto Pinto¹,⁴, Luís Matias²,⁴, Jorge R. Fernandes³,⁴, Manuel Medeiros Silva³,⁴
1 Inst. Superior de Engenharia de Lisboa, Portugal
2 Portugal Telecom, Portugal
3 Inst. Superior Técnico, Portugal
4 INESC-ID-Lisboa, Portugal

 

SESSION 1C: INTERFACE & SENSING CIRCUITS I

Chairs:
Belén Calvo, U. Zaragoza, Spain
Eugeni Isern, U. Islas Baleares, Spain

1C.1. A Closed-loop Based Implementation of the Electric Cell-substrate Impedance Sensing Method for  Cell-culture Biological Systems
Alberto Yúfera, Adoración Rueda
IMSE-CNM (CSIC/Universidad de Sevilla), Spain

1C.2. A Monolithic Low Power Impedance Measurement System
Jordi Sacristán, Fredy Segura, Antoni Baldi, Teresa Osés
Instituto de Microelectrónica de Barcelona, IMB-CNM (CSIC), Spain

1C.3. Highly Accurate Contactless Potentiometers
Antonio López-Martín, Alfonso Carlosena
Public University of Navarra, Spain

1C.4. Experimental Results and Design of an Integrated Low-Noise Read-out System for DNA Capaci­tive Sensor
Daniela De Venuto, Giancarlo Indiveri
DEE, Politecnico di Bari, Italy

 

SESSION 1D: RF DEVICES

Chairs:
Roc Berenguer, CEIT, Spain
Ramón González-Carvajal, U. Sevilla, Spain

1D.1. Modeling and Experimental Characterization of EM Coupling between Integrated Spiral Inductors
Marc Molina¹, Xavier Aragonés¹, Amaya Goñi², Benito González²
1 Universitat Politècnica de Catalunya (UPC), Spain
2 Universidad de Las Palmas de Gran Canaria (ULPGC), Spain

1D.2. Integrated Inductor Quality Factor Enhancement Considerations
Alkis Hatzopoulos¹, Dominique Schreurs², Georges Gielen², Alexios Spyronasios1
1 Aristotle University of Thessaloniki, Greece
2 Katholieke Universiteit Leuven, Belgium

1D.3. Improved Calculation of Differentially Driven RF CMOS Inductor Model Parameters
Maria Drakaki¹, Alkis Hatzopoulos², Stylianos Siskos2
1 Technological Educational Institute of Thessaloniki, Greece
2 Aristotle University of Thessaloniki, Greece

1D.4. SiGe:C BiCMOS Monolithic Millimeter Wave Integrated Circuits
Jorge Alves Torres¹,², João Costa-Freire¹,³
1 Instituto de Telecomunicações, Portugal
2 Instituto Militar dos Pupilos do Exército, Portugal
3 Instituto Superior Técnico, Technical University of Lisbon, Portugal

 

12:05 - 13:25

SESSION 2A: DSP

Chairs:
Helena Sarmento, INESC-ID, Portugal
Leopoldo García Franquelo, U. Sevilla, Spain

2A.1. Application of Bireciprocal WDF Filters to Adjacent Channel Filtering In DVB-H
Ana Cinta Oria Oria, José García Doblado, Vicente Baena Lecuyer, Antonio Torralba Silgado, Jorge Chávez Orzáez
Escuela Superior de Ingenieros, University of Sevilla, Spain

2A.2. An MPEG2 TS Parser for a DSP based Multi format IP Set-top Box
Fernando Pescador, Matías J. Garrido, César Sanz, Eduardo Juárez, Manuel César Rodríguez, Angel Groba, Francisco Javier Sánchez
Universidad Politécnica de Madrid. Spain

2A.3. A Single Chip DVB-T/H Receiver
Vicente Baena Lecuyer¹, Jorge Chávez Orzáez¹, Ana Cinta Oria Oria¹, Antonio Torralba Silgado¹, Jose García Doblado¹, Car­los Pardo², Fernando Barbero², Alvaro Pérez², Carmen Mendo², Federico Ruiz ¹
1 Escuela Superior de Ingenieros, Universidad de Sevilla, Spain
2 SIDSA, Spain

2A.4. Effect of Compiler Optimizations on DSP Processor Power and Energy Consumption
Miguel Casas Sanchez, Jose A. Rizo Morente, Chris Bleakley, J. R. González
School of Computer Science and Informatics, University College Dublin, Ireland

 

SESSION 2B: DATA CONVERTERS II

Chairs:
Antonio Torralba, U. Sevilla, Spain
Rocío del Río, IMSE/USE, Spain

2B.1. Parametrizable VHDL-AMS Model of a Transconductance Amplifier
José Ángel Díaz-Madrid¹, José Alejandro López-Alcantud², Hans Hauer¹, Gines Doménech-Asensi²
1 Fraunhofer Institute, Integrated Circuit Design – Analog, Germany
2 Universidad Politécnica de Cartagena, Spain

2B.2. Design of a CMOS VCO for Clock Generation in a Continuous-Time Sigma-Delta ADC
Jokin Segundo, Jesús Arias, Luis Quintanilla, Lourdes Enríquez, Jesús M. Hernández, José Vicente
E. T. S. I. de Telecomunicación, Universidad de Valladolid, Spain

2B.3. Behavioral Modeling for a Top-Down Design Methodology of Folded and Interpolated ADCs
Roman Mozuelos, Yolanda Lechuga, Mar Martínez, Salvador Bracho
Electronic Technology, Automatic and System Engineering Department, University of Cantabria, Spain

2B.4. In Built Hardware DAC Model for Data Converter BIST
Jeffrey Ryan, Ian Grout, Thomas O'Shea
Department of Electronic and Computer Engineering, University of Limerick, Ireland

 

SESSION 2C: BIST

Chairs:
Mar Martínez, U. Cantabria, Spain
Michel Renovell, LIRMM, France

2C.1. Low-Cost Built-in Self Test for System on Chip RF Receivers
Kay Suenaga, Miquel Roca, Eugeni Isern, Rodrigo Picos, Sebastia Bota, Eugeni García-Moreno
Grup de Tecnologia Electrònica, Universitat de les Illes Balears, Spain

2C.2. Estimation of P1dB and IP3 Parameters on RF PA's with strong nonlinearities
Pedro Mota¹, José Machado da Silva¹, John Long²
1 INESC Porto, FEUP, Universidade do Porto, Portugal
2 Technical University of Delft, The Netherlands

2C.3. Debugging Mixed-signals Circuits via the IEEE1149.4 a Built-in mixed Condition Detector
Manuel Felgueiras¹, Gustavo Alves¹, José M. Martins Ferreira²
1 ISEP / LABORIS, Portugal        2 FEUP / DEEC, Portugal

2C.4. A Sine-Wave Oscillator for Analog BIST Based on Noise-Shaping Modulation
Miguel Ángel Domínguez¹, José Luis Ausín¹, Guido Torelli², Juan Francisco Duque-Carrillo¹
1 University of Extremadura, Spain
2 University of Pavia, Italy

 

SESSION 2D: RF CIRCUITS & SUBSYSTEMS I

Chairs:
Antonio Rubio, U. Politécnica Cataluña, Spain
José Manuel de la Rosa, IMSE/USE, Spain

2D.1. On the Design Procedure for a Wideband LNA with Double Loop Feedback
Miguel Martins¹, Jorge Fernandes¹, Manuel M. Silva¹, Chris Verhoeven²
1 Instituto Superior Tecnico/INESC-ID, Portugal
2 Technical University of Delft, The Netherlands

2D.2. A Feedback Wideband LNA for UWB Applications
Rubén Pulido, Hugo García, Javier del Pino, Sunil L. Khemchandani, Antonio Hernández
Institute for Applied Microelectronics (IUMA) and Department of Electronic and Automatic Engineering (DIEA), University of Las Palmas de Gran Canaria, Spain

2D.3. A 0.18 µm CMOS LNA for Switchable Low-Power Impulse Radio Ultra Wide-Band Receivers
Enrique Barajas, Didac Gómez, Diogo Coutinho, José Luis González, Diego Mateo
Universitat Politècnica de Catalunya (UPC), Spain

2D.4. A Single-Ended to Differential Variable Gain Amplifier Stage for 868.3MHz Transceiver Fron-End
Tomás Carrasco Carrillo, Aitor Osorio Martín, Javier Sieiro Córdoba, José María López Villegas
Dep. Electrónica, Universidad de Barcelona, Spain

15:30 - 16:30

Plenary Lecture II

Silicon retina for vision
Tobias Delbrück , Inst. for Neuroinformatics, UNI-ETH ZURICH, Switzerland
Introduced by Bernabé Linares, IMSE-CNM-CSIC, Spain

16:45 - 17:45

SESSION 3A: LOW POWER DIGITAL DESIGN

Chairs:
Salvador Manich, U. Politécnica Cataluña, Spain
Javier García, U. las Palmas de Gran Canaria, Spain

3A.1. Reducing the Power Consumption of the Digital Part of a Gen2 RFID Sensor tag
Ibon Zalbide¹, Gabriel Nanclares², Alex Vaz¹, Daniel Pardo¹, Juan Francisco Sevillano¹, Igone Vélez¹
1 Department of Electronics and Communications of CEIT and TECNUN, University of Navarra, Spain
2 Fraunhofer Institut für Integrierte Schaltungen, Germany

3A.2. Pattern-guided Switching  Minimization in High Level Synthesis
Alberto A. Del Barrio, María C. Molina, José M. Mendias, Román Hermida
Dpto. Arquitectura de Computadores y Automática, Universidad Complutense de Madrid, Spain

3A.3. The Effect of Using Separated Bodies over Static Power Consumption in Static Bulk-CMOS Gates
David Guerrero, Alejandro Millán, Jorge Juan Chico, Manuel Jesús Bellido, Paulino Ruiz-de-Clavijo, Enrique Ostúa, Julián Viejo
IMSE-CNM (CSIC/Universidad de Sevilla), Spain

 

SESSION 3B: OSCILLATORS & FREQUENCY TUNING

Chairs:
Fernando Vidal, U. Málaga, Spain
Stylianos Siskos, Aristotle U. of Thessaloniki, Greece

3B.1. A  Bulk-Controlled Low-Voltage CMOS Quadrature Oscillator
Rodrigo Picos, Miquel A. Calafat, Kay Suenaga, Sebastià Bota, Miquel Roca, Eugeni Isern, Eugeni García-Moreno
Grup de Tecnologia Electrònica, Universitat de les Illes Balears, Spain

3B.2. A Relaxation-Oscillator-Based SC Square-Wave Generator with Quasi-Continuous Frequency Tunability
José Luis Ausín¹, Javier Ramos¹, Guido Torelli², Francisco Duque-Carrillo¹
1 University of Extremadura, Spain
2 University of Pavia, Italy

3B.3. Generation of Accurate Time-Constants with On-Chip Frequency Tuning Scheme
Aranzazu Otin, Santiago Celma, Concepción Aldea
Group of Electronic Design (I3A), University of Zaragoza, Spain

 

SESSION 3C: OPTICAL SENSORS

Chairs:
Atilà Herms, U. Barcelona, Spain
Pascal Fouillat, IMS-BDX, France

3C.1. A Multi Shutter Time Sensor for Multi--spectral Imaging in a 3D Reconstruction Sensor
Anthony Kolar¹, Tarik Graba¹, Andrea Pinna¹, Olivier Romain¹, Thomas Ea², Erik Belhaire³, Bertrand Granado¹
1 Université Pierre et Marie CURIE, SYEL, París, France
2  Institut Superieur d’ Electronique de Paris, France
3 Institut d’  Electronique Fondamental, Universite Paris-Sud, France

3C.2. Design and Test of a CMOS 0.35µm Pixel with Binary Output for Optical Pulsed Laser Detection
Ivan Bernat, Marta Padilla, Mauricio Moreno, Ángel Diéguez, Atilà Herms, Josep Samitier
Departament d'Electrònica, Universitat de Barcelona, Spain

3C.3. A Current Copying Method to Increase the Dynamical Range of an APS  Image Sensor
José Luis Merino, Roger Figueras, Lluís Terés
Instituto de Microelectrònica de Barcelona, IMB-CNM-CSIC, Spain

 

SESSION 3D: RF CIRCUITS & SUBSYSTEMS II

Chairs:
Antonio Núñez, U. las Palmas de Gran Canaria, Spain
Diego Vázquez, IMSE/USE, Spain

3D.1. A 0.18µm CMOS Low-Power Template Generator for Coherent Impulse-Radio Ultra Wide-Band Receivers
Enrique Barajas, Didac Gómez, Ruben Cosculluela, José Luis González, Diego Mateo
Universidad Politécnica de Cataluña, Spain

3D.2. Low-Power, Low-Noise Zero-IF CMOS Mixer Design for High Bandwidth Applications
Unai Alvarado¹, Iñigo Adin¹, Javier del Pino², Ernesto López-Murillo³, Guillermo Bistué¹, Juan Meléndez¹
1 CEIT and Tecnun (University of Navarra), Spain
2 Institute for Applied Microelectronics (IUMA),  Spain
3 University of Sevilla,  Spain

3D.3. A SiGe Front-End for a Portable DVB-H Receiver
Jonás Pérez, Nestor Barrera, Roberto Díaz, Rubén Pulido, Javier del Pino, Sunil L. Khemchandani, Antonio Hernández
Institute for Applied Microelectronics (IUMA) & Department of Electronic and Automatic Engineering (DIEA), University of Las Palmas de Gran Canaria, Spain

 

Thursday, November 22

9:00 - 10:20

SESSION 4A: DIGITAL SYSTEM DESIGN

Chairs:
Patrick Garda, UPMC, France
Eugenio Villar, U. Cantabria, Spain

4A.1. Energy Consumption Estimation Technique in Embedded Processors with Stable Power Con­sumption based on Source-Code Operator Energy Figures
Juan Castillo¹, Héctor Posadas¹, Eugenio Villar¹, Marcos Martínez²
1 University of Cantabria, Spain        
2 DS², Spain

4A.2. Application of FPGA Emulation to SoC Floorplan and Packaging Exploration
Pablo García¹, David Atienza², Giacomo Paci³, Francesco Poletti³, Luca Benini³, Giovanni De Micheli², Jose M. Mendias¹, Román Hermida¹
1 DACYA Universidad Complutense de Madrid, Spain
2 LSI/EPFL, EPFL-IC-ISIM-LSI, Switzerland
3 DEIS/Bologna, Italy

4A.3. Restricted Range Exhaustive Search: A New Heuristic for HW/SW Partitioning of Task Graphs
Bastian Knerr, Martin Holzer, Markus Rupp
Institute of Communications and RF Engineering, Vienna Univ. of Technology, Austria

4A.4. Analysis and Improvement of AMBA 3 AXI Interconnection Architectures Using Interface Models
Armando Sánchez-Peña, Pedro P. Carballo, Antonio Núñez
Institute for Applied Microelectronics (IUMA), University of Las Palmas de Gran Canaria, Spain

 

SESSION 4B: AMPLIFIERS

Chairs:
Alkis Hatzopoulos, Aristotle U. of Thessaloniki, Greece
Antonio J. López-Martín,  U. Pública Navarra, Spain

4B.1. A Compact CMOS Optical Preamplifier
José María García-del-Pozo, Santiago Celma, María Teresa Sanz, Juan Pablo Alegre
Group of Electronic Design (I3A), University of Zaragoza, Spain

4B.2. Linearity Improvement in CMOS Continuous-Time CMFB Circuits
Juan M. Carrillo, José L. Ausín, Raquel Pérez-Aloe, J. Francisco Duque-Carrillo
Dept. of Electronic Engineering, University of Extremadura,  Spain

4B.3. Analysis and Design of Two Continuously Tunable Optical Preamplifiers
M. Teresa Sanz¹, José M. García del Pozo¹, Santiago Celma¹, Arturo Sarmiento²
1 Group of Electronic Design (I3A), University of Zaragoza, Spain
2 Instituto Nacional de Astrofísica, Óptica y Electrónica, Mexico

4B.4. A 1.8 V- 1.4 GHz CMOS Programmable Gain Amplifier
Belén Calvo, Santiago Celma, Juan Pablo Alegre, Francisco Aznar
Group of Electronic Design (I3A), University of Zaragoza, Spain

 

SESSION 4C: WIRELESS SENSOR NETWORKS

Chairs:
Juan Carlos López, U. Castilla la Mancha, Spain
Carles Ferrer, U. Autónoma Barcelona, Spain

4C.1. Routing Optimization for 802.15.4 Based Wireless Networks
Manel López,  José María Gómez, Atilà Herms
Sistemes d'Instrumentació i Comunicacions (SiC), Electronics Department, Universitat de Barcelona, Spain

4C.2. A Simulation Model for Wireless Sensor Networks Based on TOSSIM
Francisco J. Rincón¹, Alexandru Susu², Marcos Sánchez-Élez¹, David Atienza¹,², Giovanni de Micheli²
1DACYA Universidad Complutense de Madrid, Spain
2 LSI/EPFL, EPFL-LSI, Switzerland

4C.3. A new Wireless Sensor for Intravenous Dripping Detection
Paul Bustamante¹,², Unai Bilbao¹, Nagore Guarretxena¹, Gonzalo Solas1
1 CEIT, Spain        2 Tecnun (University of Navarra), Spain

4C.4. A Musical Application Using Wireless Sensor Networks
Jorge Portilla, Enrique Esteban, Jesús Alcázar, Ana Abril, Yago Torroja, Teresa Riesgo
Centro de Electrónica Industrial, Universidad Politécnica de Madrid,  Spain

 

SESSION 4D: NANOELECTRONICS

Chairs:
José María Quintana, IMSE/USE, Spain
José Figuereido, U. Algarve, Portugal

4D.1. On Effective Computation with Single Electron Tunnelling Devices
Sorin Cotofana
Faculty of Electrical Engineering Computer Science and Mathematics, Delft University of Technology, The Netherlands

4D.2. High Speed Monostable-Bistable Transition Logic Element Gates with Optical Inputs at 1.3 µm/ 1.55µm
Werner Prost, Artur Poloczek, Andreas Matiss, Jörn Driesen, Franz-Josef Tegude
Department of Solid-State Electronics, University Duisburg-Essen, Germany

4D.3. On Global Communications for Nano-Architectures Brain versus Rents Rule
Valeriu Beiu ¹, ², Hoda Amer ¹, ², Martin McGinnity 2
1 College of Information Technology, UAE University, UAE
2 School of Intelligent Systems, University of Ulster, Magee, UK

4D.4. DC Operation Limits of RTD Ternary Inverters based on MML
Juan Núñez, José M. Quintana, María J. Avedillo
IMSE-CNM (CSIC & Universidad de Sevilla), Spain

 

10:50 - 11:50

Plennary Lecture III

RF-to-DIGITAL: The Big Challenge
José Silva-Martínez,Texas A&M University, USA
Introduced by Adoración Rueda, IMSE/USE, Spain

12:05 - 13:25

SESSION 5A: FPGAS

Chairs:
Andoni Irizar, CEIT, Spain
Carlos Jesús Jiménez, IMSE/USE, Spain

5A.1. Creating Partially Reconfigurable Systems
Yana Krasteva, Eduardo de la Torre, Teresa Riesgo
Centro de Electrónica Industrial, Universidad Politécnica de Madrid,  Spain

5A.2. Open FPGA-Based Development Platform for Fuzzy Systems with Applications to Communi­cations
Federico Montesino Pouzols¹, Ángel Barriga Barros¹, Diego R. López², Santiago Sánchez-Solano¹
1  IMSE-CNM (CSIC & Universidad de Sevilla), Spain
2 Spanish National Research and Education Network (RedIRIS), Spain

5A.3. Implementing a Viterbi Decoder in a FPGA for a UWB MB-OFDM Receiver
Rui Borges, Horácio Neto, Helena Sarmento
Inesc-ID/IST/TU, Lisbon, Portugal

5A.4. Space Design Exploration of a Viterbi-based ECC Encoding/Decoding Scheme by Wireless Transmission Emulation
Eduardo Peña, Antonio González, Eduardo de la Torre, Teresa Riesgo
Centro de Electrónica Industrial, Universidad Politécnica de Madrid,  Spain

 

SESSION 5B: ANALOG CIRCUITS

Chairs:
Miquel Roca, U. Islas Baleares, Spain
Ricardo Carmona, IMSE-CNM-CSIC, Spain

5B.1. A SH-Based Highly Linear 10MHz Envelope Detector
Juan Pablo Alegre, Santiago Celma, José María García del Pozo, Aranzazu Otín
Dept. of Electronic and Communications Engineering, University of Zaragoza, Spain

5B.2. A generic Signal Processor for Frequency Sensor Data Acquisition
Raúl Aragonés, Joan Oliver, Bibiana Lorente, Antoni Portero, Joaquín Saiz, Carles Ferrer
Dept. de Microelectrònica i Sistemes Electrònics, Universitat Autònoma de Barcelona (UAB), Spain

5B.3. Stabilization of Linear Diffusion via B-Template Tuning in CNNs Affected by Mismatch
Jorge Fernández Berni, Ricardo Carmona Galán, Luis Carranza González
Instituto de Microelectrónica de Sevilla -IMSE-CNM-CSIC, Spain

5B.4. A New Topology of Analogue Buffer Using Low-Temperature Polysilicon Thin-Film Transistors for Liquid Crystal Displays Applications
Ilias Pappas¹, Stylianos Siskos¹, Gerard Ghibaudo², Charalambos Dimitriadis¹
1 Department of Physics, Aristotle University of Thessaloniki, Greece
2 IMEP-MINATEC, INPG, France

 

SESSION 5C: COMUNICATION SYSTEMS

Chairs:
Eugenio García, U. Islas Baleares, Spain
Roberto Sarmiento, U. las Palmas de Gran Canaria, Spain

5C.1. System Analysis for the Design of a BTM Analog Transceiver for ERTMS/ETCS
Mikel Osinalde, Jon del Portillo, Pilar María Calvo, Juan Francisco Sevillano, Iñaki Sancho, Jaizki Mendizabal
CEIT and Tecnun (University of Navarra), Spain

5C.2. Interface for Short-Range Optical Communications in a Swarm of mm3-sized Robots
Òscar Alonso, Raimón Casanova, Andreu Sanuy, Ángel Diéguez, Josep Samitier, Anna Arbat
SiC, Electronics Department, University of Barcelona, Spain 

5C.3. GSM-R onboard System for Track-to-train Voice and Data Communication
Paul Bustamante¹,², Jon del Portillo¹, Beatriz Sedano¹, Mikel Osinalde¹
1 Electronics and Communications, CEIT,  Spain
2 Electric, Electronics and Automation, Tecnun (University of Navarra), Spain

5C.4. A 120 nm CMOS Implementation of the Digital PHY Layer of a OFDM UWB Transmitter
Estíbaliz Goikoetxea, Andoni Irizar, Ainhoa Cortés, Igone Vélez, Juan Francisco Sevillano
CEIT and Tecnun (University of Navarra), Spain

SESSION 5D: BIOINSPIRED SYSTEMS

Chairs:
Valeriu Beiu, UAE University, United Arabs Emirates
Servando Espejo, IMSE/USE, Spain

5D.1. Image Processing Architecture based on a Fully Digital AER Convolution Chip
Luis Camuñas-Mesa, Antonio Acosta-Jiménez, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco
Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Spain

5D.2. Design of Analog/Digital Simulator  Dedicated to Real-time Neurocomputing
Yannick Bornat, Jean Tomas, Colin López, Olivia Malot, Bilel Belhadj, Sylvie Renaud
IMS Labs, Université Bordeaux ¹, ENSEIRB, France

5D.3. An Specifically Designed Interface for Light Vector Trailing in a Robotic Swarm
Anna Arbat, Raimon Casanova, Andreu Sanuy, Ángel Diéguez, Josep Samitier
SiC, Electronics Department, University of Barcelona, Spain

5D.4. On the Computational Power of Address-Event-Representation (AER) Vision Processing Hard­ware
José Antonio Pérez-Carrasco¹, Teresa Serrano-Gotarredona¹, Carmen Serrano-Gotarredona², Begoña Acha², Bernabé Linares-Barranco¹
1 Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC)
2 Dpto. Teoría de la Señal, ETSIT, Universidad de Sevilla, Spain

 

15:30 - 16:30

Keynote Industrial Vision I

Mobile Phone Terminals : Platform Architectures, Technology, and HW Implications
Roberto Rivoir, Wiz4com Technologies, France
Introduced by Linda Milor, Georgia Tech., USA


16:45 - 17:45

SESSION 6A: LEAKAGE IN ICS

Chairs:
Bernd Straube, Fraunhofer IIS/EAS, Germany
Jorge Juan Chico, IMSE/USE, Spain

6A.1. Impact of Gate Tunnelling Leakage on CMOS Circuits with Full Open Defects
Daniel Arumí, Rosa Rodríguez, Joan Figueras
Departament d’Enginyeria Electrònica, Universitat Politècnica de Catalunya, Spain

6A.2. A Leakage-tolerant CMOS Comparator in Ultra Deep Submicron CMOS Technology
Farshad Moradi¹, Hamid Mahmoodi², Hamid Alimohammadi3
1 Department of Electrical and Computer Engineering, Ilam University, Iran
2 Department of Electrical and Computer Engineering, San Francisco State University, USA
3 Mahab Ghods Company, Iran

6A.3. Low Cost Estimation of Leakage Power Consumption in Large Nanometric CMOS Circuits
Raymundo Mendoza, Ricard Sanahuja, Antoni Ferre, Salvador Manich,  Luz Balado,  Joan Figueras
Departament d’Enginyeria Electrònica, Universitat Politècnica de Catalunya, Spain

 

SESSION 6B: CURRENT MODE CIRCUITS

Chairs:
Jose Machado da Silva, U. Porto, Portugal
Armando Roy, U. Zaragoza, Spain

6B.1. Output Current Folding versus Current Mirroring in CMOS Transconductors
Antonio López-Martín¹, Ramón G. Carvajal², Jaime Ramírez-Angulo³
1 Dept. Electrical and Electronic Eng., Public University of Navarra, Spain
2 Escuela Superior de Ingenieros, University of Seville, Spain
3 Klipsch Sch. of Electrical & Comp. Eng., New Mexico State University, USA

6B.2. The Stochastic I-Pot: A Circuit Block for Programming Bias Currents
Juan Antonio Leñero-Bardallo,  Rafael Serrano-Gotarredona, Luis Camuñas-Mesa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco
Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Spain

6B.3. Current-Mode CMOS Multiplier/Divider
Antonio López-Martín, Carlos A. De La Cruz Blas
Dept. Electrical and Electronic Eng., Public University of Navarra, Spain

 

SESSION 6C: TEST SETUPS

Chairs:
Lorena Anghel, TIMA, France
Joao Paulo Teixeira, Inst. Sup. Técnico, Portugal

6C.1. A Low Cost Fault Injection System for Radiation Environment Emulation
Javier Nápoles, Hipólito Guzmán, Juan Manuel Mogollón, R. Palomo, A Pérez, Miguel Aguirre, Jonathan Tombs, Fernando Muñoz, Vicente Baena, Antonio Torralba
Escuela Superior de Ingenieros, University of Seville, Spain

6C.2. ChMiST: Flexible Environment for Automated Characterization of Mixed-Signal Testchips
Jordi Madrenas, Pau Balsach, Daniel Fernández, Jordi Cosp, Luis Martínez-Alvarado
Department of Electronic Engineering, Universitat Politècnica de Catalunya, Spain

6C.3. A Tuning Algorithm for Threshold Stochastic Resonance
Fco. Rogelio Palomo Pinto, José Manuel Quero Reboul, Alfredo Pérez Vega-Leal
Dpto. Ingeniería Electrónica, Escuela Superior de Ingenieros, Universidad de Sevilla

 

SESSION 6D: RFID

Chairs:
José María López Villegas, U. Barcelona, Spain
Antonio Hernández, U. Las Palmas de Gran Canaria, Spain

6D.1. Alternative Load Modulators for a Long Range Passive RFID Sensor
Aritz Ubarretxena, Daniel Pardo, Santiago Gil, Alexander Vaz, Iñaki Sancho, Andrés García-Alonso
CEIT & TECNUN (University of Navarra), Spain

6D.2. A Passive RFID System Design and Analysis focused on Reader Performance
Iker Mayordomo¹, Roc Berenguer¹,², Daniel Valderas¹,², Joaquín de No¹, Iñaki Guruceaga¹,², Iñigo Gutiérrez¹,²
1 TECNUN, University of Navarra, Spain
2 CEIT, Spain

6D.3. Voltage Protection Circuit for the Supply Capacitor in Passive UHF RFID Sensors
Ricardo Morales-Ramos¹,  Roc Berenguer²,  Juan Antonio Montiel-Nelson¹
1 Institute for Applied Microelectronics, University of Las Palmas de G.C., Spain
2 Centro de Estudios e Investigaciones Técnicas de Guipuzkoa (CEIT), Spain

Friday, November 23

9:00 - 10:20

SESSION 7A: IP DESIGN & METRICS

Chairs:
Carles Ferrer, U. Autónoma Barcelona, Spain
Oscar Guerra, IMSE/USE, Spain

7A.1. Automated Signature Hosting for  Soft  Core Protection
Encarnación Castillo, Luis Parrilla, Antonio García, Uwe Meyer-Baese, Antonio Lloris
Department of Electronics and Computer Technology, University of Granada, Spain

7A.2. Fast Modulo 2n+1 Adder Architectures
Haridimos Vergos
Computer Engineering & Informatics Department, University of Patras, Greece

7A.3. Providing a Formal Meaning to Coverage Metrics
Iñigo Ugarte, Pablo Sánchez
Microelectronics Engineering Group, TEISA Dept., University of Cantabria, Spain

7A.4. Commercial IP Selection & Adaptation to Improve the SoC Designs Productivity in Defense and Space Applications
Carles Ferrer¹, Eleni Kanellou¹, Xavier Fitó¹, Avelino Martín², Ana Goñi², José Moreno²
1 IMB-CNM (CSIC) & Universitat Autònoma de Barcelona, Spain
2 EADS Astrium-CRISA, Spain

SESSION 7B: DEVICE MODELING

Chairs:
Joan Bausells, IMB-CNM-CSIC, Spain
Luz Balado, U. Politécnica Cataluña, Spain

7B.1. Analysis of PN Integrated Varactors with N+ Buried Layer varying P+ Diffusions Contour for RF Applications
Javier García, Benito González, Margarita Martín-Marrero, Ignacio Aldea, Javier del Pino, Antonio Hernández
Dto. de Ingeniería Electrónica y Automática (DIEA) & Instituto Universitario de Microelectrónica Aplicada (IUMA), Universidad de Las Palmas de Gran Canaria, Spain

7B.2. A 2-D Electrical Model for Disk-Shape Piezoelectric Transducers
Jean-Marc Galliere¹, Philippe Papet²
1 University of Montpellier ², Polytech'Montpellier, France
2 University of Montpellier ², LPMC, France

7B.3. A Scalable Model for Calculating Resistive Losses on Lightly and Heavily Doped Substrates
Yiorgos Bontzios¹, Alkis Hatzopoulos¹, Stefanos Stefanou², Konstantinos Nikellis²
1 Dept. of Electrical & Computer Engineering, Aristotle University of Thessaloniki, Greece
2 HELIC S.A. ,  Greece

7B.4. A FinFET Compact Model for High Frequency and Noise Analysis
Antonio Lázaro, Bogdan Nae, Benjamín Iñiguez
Dept. of Electronics, Electrics, and Automatic Engineering, Universitat Rovira i Virgili, Spain

SESSION 7C: INTERFACE & SENSING CIRCUITS II

Chairs:
Salvador Bracho, U. Cantabria, Spain
Teresa Serrano, IMSE-CNM-CSIC, Spain

7C.1. Addressing the Locomotion Problem on a mm3-sized Robot Equipped with PVDM legs
Raimon Casanova, Andreu Sanuy, Ángel Diéguez, Josep Samitier
SiC, Electronics Department, University of Barcelona, Spain 

7C.2. Interface for Tactile Sensors based on Voltage to Frequency Converters
Rocío Maldonado-López¹, Fernando Vidal-Verdú², Gustavo Liñán¹, Ángel Rodríguez-Vázquez¹
1 Instituto de Microelectrónica de Sevilla, IMSE-CNM-CSIC, Spain
2 Universidad de Malaga, Spain

7C.3. High Resolution CMOS Integrated Sensor for Human Body Temperature Monitoring
Aritz Ubarretxena¹, Iker Mayordomo², Daniel Pardo¹, Alex Vaz¹, Isabel Ayerdi¹, Roc Berenguer¹
1 CEIT, Spain
2 TECNUN, Universidad de Navarra, Spain

7C.4. Self-Powered Temperature Sensor Powered by Vibration Energy Harvesting.
Jordi Colomer, Pere L. Miribel-Català, Albert Saiz-Vela, Jordi Mañà, Manel Puig-Vidal, Josep Samitier
Sistems of Instrumentation and Comunication (SiC), Dept. of Electronics, University of Barcelona, Spain

 

SESSION 7D: INDUSTRIAL APPLICATIONS I

Chairs:
Teresa Riesgo, U. Politécnica Madrid, Spain
Jose Silva Matos, U. Porto, Portugal

7D.1. A Portable Electronic Nose Based on Solid State Sensor Arrays and their Potential Application of Freshness Assessment of Moroccan Fish
Aziz Amari, Benachir Bouchikhi
Equipe Capteurs, Electronique & Instrumentation, Université Moulay Ismaïl, Maroc

7D.2. Electrical Characterization of Conductive Ink Layers on Textile Fabrics: Model and  Experimen­tal Results
Josep Rius¹, Salvador Manich¹, Rosa Rodríguez¹, Miquel Ridao²
1 Departament d’Enginyeria Electrònica, Universitat Politècnica de Catalunya, Spain
2 FITEX Fundació per a la Innovació Tèxtil, Spain

7D.3. Design and Implementation of an Experimental Test Bench for Ultrasonic Non-Destructive Evaluation
Enrique Vargas², Sergio Toral¹, Vicente González², Raúl Gregor²
1 Digital Electronic Lab (LED), Catholic Univ. of Asunción, Paraguay
2 Electronic Engineering Department, University of Seville, Spain

7D.4. Microcontroller-based Adaptive Production-Line Testing
Michael Dimopoulos¹, Dimitris Papakostas², Alkis Hatzopoulos³, Evdokimos Konstantinidis², Alexios Spyronasios³
1 Olympia Electronics S.A., Research & Development Dept., Greece
2 Dept. of Electronics, Alexander Technological Educational Inst. of Thessaloniki, Greece
3 Dept. of Electrical & Computer Eng., Aristotle Univ. of Thessaloniki, Greece

10:50 - 11:50

Keynote Industrial Vision II

Electronic Design for the "Hostile" Automotive Environment
Herman Casier, AMI Semiconductor, Belgium
Introduced by Carlos López-Barrio, UPM, Spain

12:05 - 13:05

SESSION 8A: IMAGE &VIDEO COMPRESSION

Chairs:
Marisa López-Vallejo, U. Politécnica Madrid, Spain
Angel Barriga, IMSE/USE, Spain

8A.1. The H264 AVC Video Coding Standard: Design and Application Range
Christos Grecos
Dept. of Electronic/Electrical Engineering, Loughborough University, UK

8A.2. Dynamic Reconfigurable Hardware for Lossless Compression of Image, Video and General Data Content
Jose Luis Nunez-Yanez¹, Xiaolin Chen¹, Nishan Canagarajah¹, Raffaele Vitulli²
1 Electronic Engineering Department, Bristol University, UK
2 European Space Agency (ESA), The Netherlands

8A.3. FPGA-based Implementation of a Fuzzy Motion Adaptive De-interlacing Algorithm
Piedad Brox, Santiago Sánchez-Solano, Iluminada Baturone
Instituto de Microelectrónica de Sevilla (IMSE-CNM-CSIC), Spain

 

SESSION 8B: LOW POWER ANALOG CIRCUITS

Chairs:
Pere Miribel, U. Barcelona, Spain
Manuel Delgado-Restituto, IMSE-CNM-CSIC, Spain

8B.1. A Low-Power Baseband Filter for Zero-IF DVB-T/H Receivers
Clara Isabel Lujan-Martínez¹, Ramón G. Carvajal¹, Antonio Torralba¹, Antonio López-Martín², Jaime Ramírez-Angulo³, Unai Alvarado⁴
1 Dept. Electronic Eng., Escuela Superior de Ingenieros, University of Seville, Spain
2 Dept. Electrical and Electronic Eng., Public University of Navarra, Spain
3 Klipsch Sch. of Electrical & Comp. Eng., New Mexico State University, USA
4 Centro de Estudios e Investigaciones Técnicas de Guipuzkoa (CEIT), Spain

8B.2. Design of a Low-Power DLL for UWB-IR Timing Synchronization
Enrique Barajas, Didac Gómez, Ruben Cosculluela, José Luis González, Diego Mateo
Universidad Politécnica de Cataluña, Spain

8B.3. Low-Power Complex Filter for WLAN Applications
Trinidad Sánchez-Rodríguez¹, Ramón G. Carvajal¹, Sunil Lalchand Khemchandani², Javier Del Pino², Jaime Ramírez-Angulo³, Antonio López-Martín⁴
1 Dept. Electronic Eng., Escuela Superior de Ingenieros, University of Seville, Spain
2 Institute for Applied Microelectronics, University of Las Palmas de G.C., Spain
3 Klipsch Sch. of Electrical & Comp. Eng., New Mexico State University, USA
4 Electronics Department, Public University of Navarra, Spain

 

SESSION 8C: MEMS

Chairs:
José M. Quero, U. Sevilla, Spain
Juan Ramos, IMSE-CNM-CSIC, Spain

8C.1. CMOS Clamped-clamped Beam Resonator Signal Transduction: Reduction of the Parasitic Capacitances
Arantxa Uranga¹, Jaume Verd¹, Joan Lluís López¹, Jordi Teva¹, Francesc Torres¹, Gabriel Abadal¹, Jaume Esteve², Francesc Pérez-Murano², Núria Barniol²
1 Universidad Autónoma de Barcelona, Spain
2 IMB, Centro Nacional de Microelectrónica, Spain

8C.2. A Test Mechanism for Device Diagnostics and Process Characterization
L. A. Rocha¹, L. Mol², E. Cretu³, R. F. Wolffenbuttel², J. Machado da Silva¹, J.S. Matos¹
1 Dept. of Electrical and Computer Eng.,  Univ. of Porto, Portugal
2 Dept. Microelectronics, Delft Univ. of Technology, The Netherlands
3 Dept. Electrical & Computer Eng., Univ. of British Columbia, Canada

8C.3. High-level Modeling of a Reconfigurable MEMS Sensor Conditioning Architecture
Luis Martínez-Alvarado, Jordi Madrenas, Daniel Fernández
Departament d’Enginyeria Electrònica, Universitat Politècnica de Catalunya, Spain

 

SESSION 8D: INDUSTRIAL APPLICATIONS II

Chairs:
Daniela de Venuto. Politecnico di Bari, Italy
Raoul Velazco, TIMA, France

8D.1. A low-cost Ultrasonic Distance Measurement System with Temperature Compensation for Autonomous Robot Applications
Vicente Canals, Alejandro Bennásar, Jaume Segura
Electronic Technology Group, Universitat Illes Balears, Spain

8D.2. Experimental Test-rig for Multiphase Induction Machine Drives Applications
Raúl Gregor, Federico Barrero, Sergio Toral, Mario Duran 
Electronic & Electrical Engineering Departments, University of Seville, Spain

8D.3. Automatic Tool for High Level Hw/Sw Co-Design
Octavio Dias¹, Jose Rocha¹, Isabel Teixeira², João P. Teixeira²
1 Escola Superior de Tecnologia de Setúbal/IPS, CESET, INESC, Portugal
2 Instituto Superior Técnico, Universidade Técnica de Lisboa, INESC, Portugal