Ahmet Unutulmaz; Gunhan Dundar; Francisco V. Fernandez , “On the convex formulation of area for slicing floorplans”, Integration, the VLSI Journal, Aceptado, vol. 50, pp. 74-80, 2015.
Journals
Comparison of QMC-Based Yield-Aware Pareto Front Techniques for Multi-Objective Robust Analog Synthesis
Murat Pak; Francisco V. Fernández; Gunhan Dundar, “Comparison of QMC-Based Yield-Aware Pareto Front Techniques for Multi-Objective Robust Analog Synthesis”, Integration, the VLSI Journal, Aceptado, 2016.
DOI 10.1016/j.vlsi.2016.04.004
Reliability simulation for analog ICs: Goals, Solutions and Challenges
A. Toro-Frías, P. Martín-Lloret, J. Martín-Martínez, R. Castro-López, E. Roca, R. Rodríguez, M. Nafria, F.V: Fernández, “Reliability simulation for analog ICs: Goals, Solutions and Challenges” Acceptado, 2016.
An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors
R. González-Echevarría, E. Roca, R. Castro-López, F.V: Fernández, J. Sieiro, J.M.López-Villegas, N. Vidal, “An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors, ” IEEE Trans. COMPUTER-AIDED DESIGN of Integrated Circuits and Systems, Aceptado, 2016.
Introduction to the special issue on Radio Frequency Integrated Circuits (RFIC) design techniques
E. Roca y J. Sieiro, “Introduction to the special issue on Radio Frequency Integrated Circuits (RFIC) design techniques”, Integration, the VLSI Journal, vol. 52, pp.183-184, 2016.
Low Power Two-Stage Comb-Decimation Structures for High-Decimation Factors
G. Molina-Salgado, G. Jovanovic-Dolecek and J.M. de la Rosa, “Low Power Two-Stage Comb-Decimation Structures for High-Decimation Factors,” Analog Integrated Circuits and Signal Processing, vol. 88(2), pp.245-254, 2016.
Next-Generation Delta-Sigma Converters: Trends and Perspectives
J.M. de la Rosa, R. Schreier, K.P. Pun, S. Pavan, “Next-Generation Delta-Sigma Converters: Trends and Perspectives”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 5(4), pp. 484-499, 2015.
Template coding with LDS and applications in EDA
A. Unutulmaz, G. Dundar, F.V. Fernández, “Template coding with LDS and applications in EDA”, Analog Integrated Circuits and Signal Processing, Vol. 78, No. 1, pp. 137-151, Springer, Jan. 2014.
Maximizing Lyapunov Exponents in a Chaotic Oscillator by Applying Differential Evolution
V.H. Carbajal Gómez, E. Tlelo-Cuautle, F.V. Fernández, L.G. de la Fraga and C. Sánchez-López, “Maximizing Lyapunov Exponents in a Chaotic Oscillator by Applying Differential Evolution”, Int. J. of Nonlinear Sciences and Numerical Simulation, Vol. 15, No. 1, pp. 11-18, De Gruyter, Jan. 2014.
A Fast Readout Electronic System for Accurate Spatial Detection in Ion Beam Tracking for the Next Generation of Particle Accelerator
A. Garzón-Camacho, B. Fernández, M.A.G. Alvarez, J. Ceballos and J.M. de la Rosa: “A Fast Readout Electronic System for Accurate Spatial Detection in Ion Beam Tracking for the Next Generation of Particle Accelerators.” IEEE Trans. on Instrumentation and Measurement, vol. 64, pp. 318-327, February 2015.
Open Access: http://hdl.handle.net/10261/109682
Efficient Hybrid Continuous-Time/Discrete-Time Cascade Sigma-Delta Modulators for Wideband Applications
J.G. García-Sánchez and J.M. de la Rosa: “Efficient Hybrid Continuous-Time/Discrete-Time
Cascade Sigma-Delta Modulators for Wideband Applications.” Microelectronics Journal, vol. 45, pp.
1234-1246, October 2014.
DOI 10.1016/j.mejo.2013.10.017
Open Access: http://hdl.handle.net/10261/107830
Guest Editorial: Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013)
J.M. de la Rosa, J.W.M. Rogers and V. Chandra: “Guest Editorial: Special Section on the 2013 IEEE
Custom Integrated Circuits Conference (CICC 2013).” IEEE Trans. on Circuits and Systems – I:
Regular Papers, vol. 61, pp. 2217-2218, August 2014.
Automated generation of optimal performance trade-offs of integrated inductors
R. González-Echevarría, R. Castro-López, E. Roca, F.V. Fernández, J. Sieiro, N. Vidal and J.M. López-Villegas, “Automated generation of optimal performance trade-offs of integrated inductors,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 1269-1273, Vol. 33, No. 8, Aug. 2014.
LC-based Bandpass Continuous-Time Sigma-Delta Modulators with Widely Tunable Notch Frequency
G. Molina-Salgado, A. Morgado, G. Jovanovic-Dolecek and J.M. de la Rosa: “LC-based Bandpass Continuous-Time Sigma-Delta Modulators with Widely Tunable Notch Frequency.” IEEE Trans. on Circuits and Systems – I: Regular Papers, vol. 61, pp. 1442-1455, May 2014.
Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors
M. Kotti, R. González-Echevarría, F.V. Fernández, E. Roca, J. Sieiro, R. Castro-López, M.Fakhfakh and J.M. López-Villegas, “Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors”, Analog Integrated Circuits and Signal Processing, Vol. 78, No. 1, pp. 87-97, Jan. 2014.
doi:10.1007/s10470-013-0230-8
Introduction to the special issue on SMACD 2012
F.V. Fernández, E. Roca and R. Castro-López, “Introduction to the special issue on SMACD 2012”, Analog Integrated Circuits and Signal Processing, Vol. 78, No. 1, pp. 61-73, Springer, Jan. 2014.
Open Access: http://hdl.handle.net/10261/92901
Current-limiting and ultrafast system for the characterization of Resistive Random Access Memories
J. Diaz-Fortuny, M. Maestro, J. Martin-Martinez, A. Crespo-Yepes, R. Rodriguez, M. Nafria and X. Aymerich, “Current-limiting and ultrafast system for the characterization of Resistive Random Access Memories”, Review of Scientific Instruments, Vol. 87, Issue 6, 064705 (2016)
DOI: 10.1063/1.4954973
Open access http://ddd.uab.cat/record/163087
Conductance of Threading Dislocations in InGaAs/Si Stacks by Temperature-CAFM Measurements
C. Couso, V. Iglesias, M. Porti, S. Claramunt, M. Nafria, N. Domingo, G. Bersuker and A. Cordes, “Conductance of Threading Dislocations in InGaAs/Si Stacks by Temperature-CAFM Measurements”, IEEE Electron Device Letters, Vol. 37, Issue: 5, pp. 640-643 (2016)
DOI: 10.1109/LED.2016.2537051
open access http://ddd.uab.cat/record/163088
A new high resolution Random Telegraph Noise (RTN) characterization method for Resistive RAM
M. Maestro, J. Diaz, A. Crespo-Yepes, M. B. Gonzalez, J. Martin-Martinez, R. Rodriguez, M. Nafria, F. Campabadal and X. Aymerich, “A new high resolution Random Telegraph Noise (RTN) characterization method for Resistive RAM”, Solid State Electronics, Vol. 115, pp. 140-145 (2016)
DOI: 10.1016/j.sse.2015.08.010
Open access http://ddd.uab.cat/record/163089
Dedicated random telegraph noise characterization of Ni/HfO2-based RRAM devices
M.B. Gonzalez, J. Martin-Martinez, R. Rodriguez, M.C. Acero, M. Nafria, F. Campabadal, X. Aymerich, “Dedicated random telegraph noise characterization of Ni/HfO2-based RRAM devices”, Microelectronic Engineering, Vol.147, pp. 59-62 (2015)
DOI: 10.1016/j.mee.2015.04.046
Open access http://ddd.uab.cat/record/136895