M. Pak, A.E. Yarimbiyik, G. Dundar and F.V. Fernández, “Statistical analysis of active and passive RF devices”, Proceedings of the 10th International Conference on Advance Semiconductor Devices & Microsystems (ASDAM 2014), Smolenice (Eslovaquia), 20-22 octubre 2014.
Dissemination
Hierarchical Composition of Pareto-Optimal Fronts of Analog Circuits: Implementation Issues
M. Velasco-Jiménez, R. Castro-López, E. Roca and F.V. Fernández, “Hierarchical Composition of Pareto-Optimal Fronts of Analog Circuits: Implementation Issues”, Proceeding of the 2014 Conference on Design of Circuits and Integrated Systems, Madrid, Spain, November 2014.
Characterization of random telegraph noise and its impact on reliability of SRAM sense amplifiers
J. Martin-Martinez, J. Díaz, R. Rodriguez, M. Nafria, X. Aymerich, E. Roca, F.V. Fernández and A. Rubio, “Characterization of random telegraph noise and its impact on reliability of SRAM sense amplifiers”, Proceedings of the 5th European Workshop on CMOS Variability (VARI), Palma de Mallorca, España, 29 septiembre-1 octubre 2014.
Open Acess: http://upcommons.upc.edu/handle/2117/27058
Single Event Transients trigger instability in Sigma-Delta Modulators
D. Malagon, J. M. de la Rosa, R. del Río and G. Leger: “Single Event Transients trigger instability in Sigma-Delta Modulators”. Proceeding of the 2014 Conference on Design of Circuits and Integrated Systems, Madrid, Spain, November 2014.
Spatial Detection System for Mini-Secondary Electrons Detectors
A. Garzón-Camacho, B. Fernández, M.A.G. Alvarez, J. Ceballos and J. M. de la Rosa: “Spatial Detection System for Mini-Secondary Electrons Detectors”. Proceeding of the 2014 Conference on Design of Circuits and Integrated Systems, Madrid, Spain, November 2014.
On the Efficiency of Comb Structures for Sigma-Delta ADCs with High Even Decimation Factors
G. Molina-Salgado, G. Jovanovic-Dolecek and J. M. de la Rosa: “On the Efficiency of Comb Structures for Sigma-Delta ADCs with High Even Decimation Factors”. Proceeding of the 2014 Conference on Design of Circuits and Integrated Systems, Madrid, Spain, November 2014.
Sigma-Delta ADCs for Software-Defined-Radio Applications
G. Molina-Salgado, G. Jovanovic-Dolecek and J. M. de la Rosa: “Sigma-Delta ADCs for Software-Defined-Radio Applications”. PhD Forum of the 22nd IFIP/IEEE Intl. Conference on Very Large Scale Integration (VLSI-SoC), Playa del Carmen, Cancún, Mexico, October 2014.
Readout Electronics System for Particle Tracking in Secondary Electron Detectors
A. Garzón-Camacho, B. Fernández, M.A.G. Alvarez, J. Ceballos and J.M. de la Rosa: “Readout Electronics System for Particle Tracking in Secondary Electron Detectors”. Proceeding of the 2014 International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, Texas, USA, August 2014.
Comb Structures for Sigma-Delta ADCs with High Even Decimation Factors
G. Molina-Salgado, G. Jovanovic-Dolecek and J.M. de la Rosa: “Comb Structures for Sigma-Delta ADCs with High Even Decimation Factors”. Proceeding of the 2014 International Midwest Symposium on Circuits and Systems (MWSCAS), College Station, Texas, USA, August 2014.
Design Considerations of Bandpass CT Sigma-Delta Modulators for Software-Defined-Radio Receivers
G. Molina-Salgado, G. Jovanovic-Dolecek, A. Morgado and J.M. de la Rosa: “Design Considerations of Bandpass CT Sigma-Delta Modulators for Software-Defined-Radio Receivers”. Proceeding of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, June 2014.
An Overview of Decimator Structures for Efficient Sigma-Delta Converters: Trends, Design Issues and Practical Solutions
G. Molina-Salgado, G. Jovanovic-Dolecek and J.M. de la Rosa: “An Overview of Decimator Structures for Efficient Sigma-Delta Converters: Trends, Design Issues and Practical Solutions”. Proceeding of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, June 2014.
Using Simulink S-Functions for the Efficient Modeling and Simulation of Analog Integrated Circuits and Systems
J.M. de la Rosa: “Using Simulink S-Functions for the Efficient Modeling and Simulation of Analog Integrated Circuits and Systems”. Proceeding of the 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, Australia, June 2014.
Improving the Learning Experience of Micro/Nanoelectronic Materials and Devices with nanoHUB
J.M. de la Rosa: “Improving the Learning Experience of Micro/Nanoelectronic Materials and Devices with nanoHUB”. Poster presentation at the First Annual nanoHUB Users Conference, Phoenix, USA, March 2014.
Model-based hierarchical optimization strategies for analog design automation
E. Afacan, G. Dundar, F. Baskaya and F.V. Fernández, “Model-based hierarchical optimization strategies for analog design automation,” Proc. Design Automation and Test in Europe Conf., Dresden, Alemania, March 2014.
Implementation issues in the hierarchical composition of performance models of analog circuits
M. Velasco, R. Castro-López, E. Roca and F.V. Fernández, “Implementation issues in the hierarchical composition of performance models of analog circuits”, Proc. Design Automation and Test in Europe Conf., Dresden, Alemania, March 2014.
J.G. García-Sánchez, D. Calderón-Preciado, F. Sandoval-Ibarra and J.M. de la Rosa: “Behavioral Modeling of a 4th-Order LP Sigma-Delta Modulator – Towards the Design of a Hybrid Proposal”. Proceeding of the 2014 IEEE Latin American Symposium on Circuits and Systems (LASCAS), Santiago de Chile, Chile, February 2014.
Modified Comb Decimator for High Power-of-Two Decimation Factors
G. Molina-Salgado, G. Jovanovic-Dolecek and J.M. de la Rosa: “Modified Comb Decimator for High Power-of-Two Decimation Factors”. Proceeding of the 2014 IEEE Latin American Symposium on Circuits and Systems (LASCAS), Santiago de Chile, Chile, February 2014.
On the convex formulation of area for slicing floorplans
Ahmet Unutulmaz; Gunhan Dundar; Francisco V. Fernandez , “On the convex formulation of area for slicing floorplans”, Integration, the VLSI Journal, Aceptado, vol. 50, pp. 74-80, 2015.
Comparison of QMC-Based Yield-Aware Pareto Front Techniques for Multi-Objective Robust Analog Synthesis
Murat Pak; Francisco V. Fernández; Gunhan Dundar, “Comparison of QMC-Based Yield-Aware Pareto Front Techniques for Multi-Objective Robust Analog Synthesis”, Integration, the VLSI Journal, Aceptado, 2016.
DOI 10.1016/j.vlsi.2016.04.004
Reliability simulation for analog ICs: Goals, Solutions and Challenges
A. Toro-Frías, P. Martín-Lloret, J. Martín-Martínez, R. Castro-López, E. Roca, R. Rodríguez, M. Nafria, F.V: Fernández, “Reliability simulation for analog ICs: Goals, Solutions and Challenges” Acceptado, 2016.