An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors

R. González-Echevarría, E. Roca, R. Castro-López, F.V: Fernández, J. Sieiro, J.M.López-Villegas, N. Vidal, “An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors, ” IEEE Trans. COMPUTER-AIDED DESIGN of Integrated Circuits and Systems, Aceptado, 2016.

DOI: 10.1109/TCAD.2016.2564362

Current-limiting and ultrafast system for the characterization of Resistive Random Access Memories

J. Diaz-Fortuny, M. Maestro, J. Martin-Martinez, A. Crespo-Yepes, R. Rodriguez, M. Nafria and X. Aymerich, “Current-limiting and ultrafast system for the characterization of Resistive Random Access Memories”, Review of Scientific Instruments, Vol. 87, Issue 6, 064705 (2016)

DOI: 10.1063/1.4954973
Open access http://ddd.uab.cat/record/163087

Conductance of Threading Dislocations in InGaAs/Si Stacks by Temperature-CAFM Measurements

C. Couso, V. Iglesias, M. Porti, S. Claramunt, M. Nafria, N. Domingo, G. Bersuker and A. Cordes, “Conductance of Threading Dislocations in InGaAs/Si Stacks by Temperature-CAFM Measurements”, IEEE Electron Device Letters,  Vol. 37,  Issue: 5, pp. 640-643 (2016)

DOI: 10.1109/LED.2016.2537051
open access http://ddd.uab.cat/record/163088

A new high resolution Random Telegraph Noise (RTN) characterization method for Resistive RAM

M. Maestro, J. Diaz, A. Crespo-Yepes, M. B. Gonzalez, J. Martin-Martinez, R. Rodriguez, M. Nafria, F. Campabadal and X. Aymerich, “A new high resolution Random Telegraph Noise (RTN) characterization method for Resistive RAM”, Solid State Electronics, Vol. 115, pp. 140-145 (2016)

DOI: 10.1016/j.sse.2015.08.010
Open access http://ddd.uab.cat/record/163089