Publications

 

2015

Journals

1. On the convex formulation of area for slicing floorplans

A. Unutulmaz, G. Dundar, F.V. Fernández. Integration, vol. 50, pp 74-80, 2015.

DOI: 10.1016/j.vlsi.2015.01.008

2. Improving speed of tunnel FETs logic circuits

M.J. Avedillo, J. Núñez. IET Electronics Letters, vol. 51, no. 21, pp 1702-1704, 2015.

DOI: 10.1049/el.2015.2416

3. Application specific integrated circuit solution for multi-input multi-output piecewise-affine functions

P. Brox, M.C. Martínez‐Rodríguez, E. Tena‐Sánchez, I. Baturone, A.J. Acosta. International Journal of Circuit Theory and Applications, vol. 44, no. 1, pp. 4-20, 2015.

DOI: 10.1002/cta.2058

4. Digital VLSI Implementation of Piecewise-Affine Controllers Based on Lattice Approach

M.C. Martínez-Rodríguez, P. Brox, I. Baturone. IEEE Transactions on Control Systems Technology, vol. 23, no. 3, pp 842-854, 2015

DOI: 10.1109/TCST.2014.2345094

 

International Conferences

1. Transformation conditions of performance fronts of operational amplifiers

E Roca, R Castro-Lopez, M. Velasco, FV Fernandez. Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015.

2. Surrogate modeling and optimization of inductor performances using Kriging functions

F. Passos, R Gonzalez-Echevarria, E Roca, R Castro-Lopez, FV Fernandez. Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015.

3. A fast and accurate reliability simulation method for analog circuits

A.Toro-Frías, R. Castro-López, E. Roca, F.V. Fernández, J Martin-Martinez, R Rodriguez, M Nafria. Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015.

4. Physical vs. Surrogate Models of Passive RF Devices

F. Passos, M. Kotti, R. González-Echevarría, M.H. Fino, M. Fakhfakh, E. Roca, R.Castro-López and F.V. Fernández. Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2015.

5. Design Space Exploration Using Hierarchical Composition of Performance Models

M. Velasco-Jiménez, R. Castro-López, E. Roca and F.V. Fernández. Proc. IEEE International Symposium on Circuits and Systems (ISCAS), 2015.

6. Integration of QMC based yield-aware pareto front techniques on MOEA/D for robust analog synthesis

M. Pak, G. Dundar, FV Fernandez. Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015.

7. A two-step layout-in-the-loop design automation tool

G. Berkol, A. Unutulmaz, E. Afacan, G. Dündar, F.V. Fernandez, A.E. Pusane, F. Başkay. Proc. IEEE 13th International New Circuits and Systems Conference (NEWCAS), 2015.

8. Bloques de detección de matrículas sobre hardware reconfigurable

J.C. Gutiérrez, E. Augusto-Perdomo, L.M. Garcés-Socarrás, A.J. Cabrera Sarmiento, S. Sánchez-Solano and P. Brox-Jiménez. Proc. XVI Convención de Ingeniería Eléctrica (CIE), 2015.

9. Dedicated Hardware IP Module for Fingerprint Recognition

M.C. Martínez-Rodríguez, R. Arjona, P. Brox and I. Baturone. Proc. International Symposium on Consumer Electronics (ISCE), 2015.

10. Hardware implementation of a background substraction algorithm in FPGA-based platforms

E. Calvo-Gallego, P. Brox and S. Sánchez-Solano. Proc. IEEE International Conference on Industrial Technology (ICIT), 2015.

11. Programmable ASICs for Model Predictive Control

M.C. Martínez-Rodríguez, P. Brox, E. Tena, A.J. Acosta and I. Baturone. Proc. IEEE International Conference on Industrial Technology (ICIT), 2015.

12. Assessing application areas for tunnel transistor technologies

M.J. Avedillo and J. Núñez. Proc. Conference on Design of Circuits and Integrated Systems (DCIS), 2015.

13. Low-jitter differential clock driver circuits for high-performance high-resolution ADCs

J. Núñez, A.J. Gines, E. Peralías and A. Rueda. Proc. Conference on Design of Circuits and Integrated Systems (DCIS), 2015.

14. Improving robustness of dynamic logic based pipelines

H.J. Quintero, M.J. Avedillo and J. Núñez. Proc. Conference on Design of Circuits and Integrated Systems (DCIS), 2015.

15. An approach to the design of low-jitter differential clock recovery circuits for high performance ADCs

J. Núñez, A.J. Ginés, E.J. Peralías and A. Rueda. Proc. IEEE Latin American Symposium on Circuits and Systems (LASCAS), 2015.

 

Books and Books Chapters

1. Modeling of variability and reliability in analog circuits

E. Roca, R. Castro-López, F.V: Fernández, R. González-Echevarría, J. Sieiro, N. Vidal and J.M. López-Villegas, chapter in Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, pp. 277-296, Springer International Publishing, Dordrecht (The Netherlands), 2015.

DOI: 10.1007/978-3-319-19872-9_10

2. Smas: A generalized and efficient framework for computationally expensive electronic design optimization problems

B. Liu, F.V. Fernández, G. Gielen, A. Karkar, A. Yakovlev, V. Grout, chapter in Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, pp. 277-296, Springer International Publishing, Dordrecht (The Netherlands), 2015.

DOI: 10.1007/978-3-319-19872-9_9

3. Application of computational intelligence techniques to maximize unpredictability in multiscroll chaotic oscillators

VH Carbajal-Gómez, E Tlelo-Cuautle, FV Fernández, chapter in Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design, pp. 277-296, Springer International Publishing, Dordrecht (The Netherlands), 2015.

DOI: 10.1007/978-3-319-19872-9_3