Publications

 

2016

Journals

1. Reliability simulation for analog ICs: Goals, Solutions and Challenges

 A Toro-Frías, P Martín-Lloret, J Martin-Martinez, R Castro-López, E Roca, R Rodriguez, M Nafria, FV Fernandez, Integration, vol. 55, pp 341-348, 2016.

DOI: 10.1016/j.vlsi.2016.05.002

2. Introduction to the special issue on Radio Frequency Integrated Circuits (RFIC) design techniques

E. Roca and J. Sieiro, Integration, vol. 52, pp 183-184, 2016.

DOI: 10.1016/j.vlsi.2015.11.001

3. Comparison of QMC-based yield-aware pareto front techniques for multi-objective robust analog synthesis

 M. Pak, F.V. Fernández, G. Dundar. Integration, vol. 55, pp357-365, 2016.

DOI: 10.1016/j.vlsi.2016.04.004

4. Introduction to the special issue on SMACD 2015

G. Dundar, N. Horta, F.V. Fernandez, Integration, vol. 55, pp 293-294, 2016.

DOI: 10.1016/j.vlsi.2016.09.001

5. Design methodology for low-jitter differential clock recovery circuits in high performance ADCs

J. Núñez, A.J. Ginés, E. Peralías, A. Rueda, Analog Integrated Circuits and Signal Processing, vol. 89, no. 3, pp. 593-609, 2016.

DOI: 10.1007/s10470-016-0870-6

6. Comparative Analysis of Projected Tunnel and CMOS Transistors for Distinct Logic Applications Areas

J. Núñez, M.J. Avedillo, IEEE Transactions on Electron Devices, vol. 63, no. 12, pp. 5012-5020, 2016.

DOI: 10.1109/TED.2016.2616891

7. Comparison of TFETs and CMOS using optimal design points for power-speed trade-offs

J. Núñez, M.J. Avedillo, IEEE Transactions on Nanotechnology, vol. 16, no. 1, pp. 83-89, 2016.

DOI: 10.1109/TED.2016.2616891

8. Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems

E. Calvo-Gallego, P. Brox and S. Sanchez-Solano, Journal of Real-Time Image Processing, vol. 12, no. 4, pp 681-695, 2016.

DOI: 10.1007/s11554-014-0455-5

9. Modificación automática de arquitecturas de módulos hardware de procesado de imágenes

L.M. Garcés-Socarrás, A.J. Cabrera-Sarmiento, S. Sánchez-Solano, P. Brox-Jiménez, E. Ieno and T. Cleber-Pimenta, Revista de Ingeniería Electrónica, Automática y Comunicaciones RIELAC, vol. 37, no. 3, pp 21-23, 2016.

 

International Conferences

1. Frequency-Dependent Parameterized Macromodeling of Integrated Inductors

F. Passos, E. Roca, R.Castro-López, F.V. Fernández, Y. Ye, D. Spina, T. Dhaene. Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2016.

2. SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization

F. Passos, E. Roca, R.Castro-López, F.V. Fernández. Proc. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2016.

3. Personal Exposure to Radiofrequency Electromagnetic Fields: University of Barcelona Study

N. Vidal, A. García-Miquel, A. Rios, J.M. López-Villegas, E Roca. Proc. European Conference on Antennas and Propagation (EUCAP), 2016.

4. Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models

F. Passos, R. Gonzalez-Echevarria, E. Roca, R. Castro-Lopez, F.V. Fernandez. Proc. Design Automation and Test in Europe Conference and Exhibition (DATE), 2016.

5. DigitalLib: Una librería VHDL de bloques básicos para automatizar la construcción de sistemas digitales complejos

M. Brox, A. Gersnoviez, I. Bujalance, F.J. Quiles, M.A. Ortiz and P. Brox. Proc. Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE), 2016 .

6. Diseño de sistemas sensoriales basados en la plataforma Arduino

P. Brox, G. Huertas-Sanchez, A. Lopez-Angulo, M. Alvarez-Mora and I. Haya. Proc. Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE), 2016.

7. Hardware implementation of fuzzy inference systems for real-time video processing applications

S. Sánchez-Solano, M. Brox, E. Calvo-Gallego, A. Gersnoviez and P. Brox. Proc. XVIII Congreso Español sobre Tecnologías y Lógica Fuzzy (ESTYLF), 2016.

8. FPGA Implementation of the Two-Dimensional Fuzzy-ELA Algorithm for Image Enlargement

M. Brox, S. Sánchez-Solano, P. Brox, A. Gersnoviez and I. Baturone. Proc. XVIII Congreso Español sobre Tecnologías y Lógica Fuzzy (ESTYLF), 2016.

9. Complementary Tunnel Gate Topology to Reduce Crosstalk Effects

J. Núñez and M.J. Avedillo. Proc. Conference on Design of Circuits and Integrated Systems (DCIS), 2016.

10. Impact of Pipeline in the Power Performance of Tunnel Transistor Circuits

M.J. Avedillo and J. Núñez. Proc. Int. Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016.

11. Secure Cryptographic Hardware Implementation Issues for High-Performance Applications

E. Tena-Sánchez, A.J. Acosta and J. Nuñez. Proc. Int. Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2016.

 

Books and Books Chapters

1. Circuit Realization of the Synchronization of Two Chaotic Oscillators with Optimized Maximum Lyapunov Exponen

V.H. Carbajal-Gómez, E. Tlelo-Cuautle, F.V. Fernández. Advances in Chaos Theory and Intelligent Control, vol. 337, pp 627-651, 2016.

DOI: 978-3-319-30340-6_26