Publications

2017

Journals

1. Radio-Frequency Inductor Synthesis Using Evolutionary Computation and Gaussian-Process Surrogate Modeling

F. Passos, E. Roca, R. Castro-López, F.V. Fernández, Applied Soft Computing, vol. 60, pp 495-507, 2017.

DOI: 10.1016/j.asoc.2017.07.036

2. Parametric macromodeling of integrated inductors for RF circuit design

F. Passos, Y. Ye, D. Spina, E. Roca, R. Castro-López, T. Dhaene, F.V. Fernández, Microwave and Optical Technology Letters, vol. 59(5), pp 1207-1212, 2017.

DOI: 10.1002/mop.30498

3. An inductor modeling and optimization toolbox for RF circuit design

F. Passos, E. Roca, R. Castro-López, F.V. Fernández, Integration, vol. 58, pp 463-472, 2017.

DOI: 10.1016/j.vlsi.2017.01.009

4. An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors

R. González-Echevarría, E. Roca, R. Castro-López, F.V: Fernández, J. Sieiro, J.M. López-Villegas y N. Vidal, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 36(1), pp 15-26, 2017.

DOI: 10.1109/TCAD.2016.2564362

5. Insights into the Operation of Hyper-FET based Circuits

M.J. Avedillo, J. Núñez, IEEE Transactions on Electron Devices, vol. 64, no. 9, pp. 3912-3918, 2017.

DOI: 10.1109/TED.2017.2726765

6. Reducing the Impact of Reverse Currents in Tunnel FET Rectifiers for Energy Harvesting Applications

J. Núñez, M.J. Avedillo, IEEE Journal of Electron Devices Society, vol. 5, no. 6, pp. 530-534, 2017.

DOI: 10.1109/TED.2017.2726765

7. Model-based implementation of self-configurable intellectual property modules for image histogram calculation in FPGAs

L.M. Garcés-Socarrás, D.A. Romero, A.J. Cabrera, S. Sánchez-Solano and P. Brox, vol. 37, no. 2, pp 74-81, 2017.

DOI: 10.15446/ing.investig.v37n2.62328

 

International Conferences

1. A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs

P Martín-Lloret, A Toro-Frías, J Martin-Martinez, R Castro-López, E Roca, R Rodriguez, M Nafria, FV Fernandez. Proc. IEEE Int. Symposium on Circuits and Systems (ISCAS), 2017.

2. A strategy to efficiently include electromagnetic simulations in optimization-based RF circuit design methodologies

F Passos, E Roca, R Castro-López, FV Fernández, J Sieiro, JM López-Villegas. Proc. IEEE MTT-S Int. Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization for RF, Microwave, and Terahertz Applications (NEMO), 2017.

3. An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective

F Passos, E Roca, R Castro-López, FV Fernández. Proc. IEEE Congress on Evolutionary Computation (CEC), 2017.

4. Extending the frequency range of quasi-static electromagnetic solvers

S. Ahyoune, J. Sieiro, T. Carrasco, N. Vidal, J.M López-Villegas, E. Roca, F.V Fernández. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

5. Including a stochastic model of aging in a reliability simulation flow

A Toro-Frías, P Martin-Lloret, R Castro-López, E Roca, FV Fernández, J Martin-Martinez, R Rodriguez, M Nafria. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

6. Systematic design of a voltage controlled oscillator using a layout-aware approach

F Passos, E Roca, R Castro-López, FV Fernández, R Martins, N Lourenço, R Póvoa, A Canelas, N Horta. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

7. TARS: A toolbox for statistical reliability modeling of CMOS devices

J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, M Nafria, R Castro-Lopez, E Roca, FV Fernandez. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

8. New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization

N Lourenço, R Martins, R Póvoa, A Canelas, N Horta, F Passos, R Castro-López, E Roca, FV Fernández. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

9. Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks

R Martins, N Lourenço, R Póvoa, A Canelas, N Horta, F Passos, R Castro-López, E Roca, FV Fernández. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

10. CASE: A reliability simulation tool for analog ICs

P Martín-Lloret, A Toro-Frías, R Castro-López, E Roca, FV Fernández, J Martin-Martinez, R Rodriguez, M Nafria. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

11. A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging

J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, M Nafria, R Castro-Lopez, E Roca, FV Fernandez, E Barajas, X Aragones, D Mateo. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

12. Statistical characterization of unreliability effects in a 65-nm CMOS transistor array

J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, M Nafria, R Castro-Lopez, E Roca, FV Fernandez. Proc. 22nd International Mixed-Signal Testing Workshop (IMSTW), 2017.

13. Statistical characterization of reliability effects in nanometer CMOS using a versatile transistor array IC

J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, M Nafria, R Castro-Lopez, E Roca, FV Fernandez, E Barajas, X Aragones, D Mateo. Proc. Design of Circuits and Integrated Systems Conference (DCIS), 2017.

14. Efficient Computation of Yield and Lifetime for Analog ICs under Process Variabiliy and Aging

A Toro-Frías, P Martin-Lloret, J Martin-Martinez, R Castro-Lopez, R Rodriguez, E Roca, M Nafria, FV Fernandez. Proc. Design of Circuits and Integrated Systems Conference (DCIS), 2017.

15. Design and characterization of a miniaturized implantable UHF RFID tag based on LTCC technology

A Garcia-Miquel, B Medina-Rodríguez, N Vidal, FM Ramos, E Roca, JM Lopez-Villegas. Proc. 11th European Conference on Antennas and Propagation (EUCAP), 2017.

16. Dependence of MOSFETs threshold voltage variability on channel dimensions

C Couso, J Diaz-Fortuny, J Martin-Martinez, M Porti, R Rodriguez, M Nafria, FV Fernandez, E Roca, R Castro-Lopez, E Barajas, D Mateo, X Aragones. Proc. Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2017.

17. Optimization of a MEMS accelerometer using a multiobjective evolutionary algorithm

M. Pak, F.V. Fernández, G. Dundar. Proc. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2017.

18. CMOS digital design of a trusted virtual sensor

M.C. Martínez-Rodríguez, M.A. Prada, P. Brox and I. Baturone. Proc. IEEE Nordic Circuits and Systems Conference (NORCAS), 2017.

19. Exploiting the variability of semiconductor fabrication process for hardware security 

I. Baturone, P. Brox, R. Arjona and M.A. Prada-Delgado. How to survive in an unreliable world, IEEE CEDA Spain Chapter / NANOVAR Workshop, 2017.