Publications

 

2018

Journals

1. A comparative analysis of VLSI trusted virtual sensors

M.C. Martínez-Rodríguez, P. Brox and I. Baturone, Microprocessors and Microsystems, vol. 61, pp 108-116, 2018.

DOI: 10.1016/j.micpro.2018.05.016

2. VLSI Design of Trusted Virtual Sensors

M.C. Martínez-Rodríguez, M.A. Prada-Delgado, P. Brox and I. Baturone, Sensors, vol. 18, no. 2, article 347, 2018.

DOI: 10.3390/s18020347

3. PVT-robust CMOS programmable chaotic oscillator: Synchronization of two 7-scroll attractors

V.H. Carbajal-Gomez, E. Tlelo-Cuautle, C. Sanchez-Lopez and F.V. Fernandez-Fernandez, Electronics, vol. 7, no. 10, article 252, 2018.

DOI: 10.3390/electronics7100252

4. A comparison of automated RF circuit design methodologies: online vs. offline passive component design

F. Passos, E. Roca, R. Castro-López and F.V. Fernández, IEEE Transactions on Very Large Scale Integration Systems, vol. 26, no. 11, pp 2386-2394, 2018.

DOI: 10.1109/TVLSI.2018.2859827

5. A novel design methodology for the mixed-domain optimization of a MEMS accelerometer

M. Pak, F.V. Fernandez and G. Dundar, Integration, vol. 62, pp 314-321, 2018.

DOI: 10.1016/j.vlsi.2018.03.018

6. Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator

S. Ahyoune, J. Sieiro, T. Carrasco, N. Vidal, J.M. López-Villegas, E. Roca and F.V. Fernández, Integration, vol. 63, pp 332-341, 2018.

DOI: 10.1016/j.vlsi.2018.02.006 

7. Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology

F. Passos, R. Martins, N. Lourenço, E. Roca, R. Póvoa, A. Canelas, R. Castro-López, N. Horta and F.V. Fernández, Integration, vol. 63, pp 351-361, 2018 .

DOI: 10.1016/j.vlsi.2018.02.005

8. Phase Transition FETs for Improved Dynamic Logic Gates

M.J. Avedillo, M. Jiménez and J. Núñez, IEEE Electron Device Letters, vol. 39, no. 11, pp 1776-1779, 2018 .

DOI: 10.1109/LED.2018.2871855

9. Impact of the RT-level architecture on the power performance of tunnel transistor circuits

M.J. Avedillo and J. Núñez, International Journal of Circuit Theory and Applications, vol. 46, no. 3, pp 647-655, 2018.

DOI: 10.1002/cta.2398

10. PVT-robust CMOS programmable chaotic oscillator: Synchronization of two 7-scroll attractors

V.H. Carbajal-Gomez, E. Tlelo-Cuautle, C. Sanchez-Lopez, F.V. Fernandez, Electronics, vol. 7, no. 10, 252, 2018.

DOI: 10.3390/electronics7100252

11. Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017

G. Di Capua, N. Horta, F.V. Fernández, G. Dündar, S. Pennisi, G. Palumbo, M. Alioto, G. Giustoli, Integration, vol. 63, 273-274, 2018.

DOI: 10.1016/j.vlsi.2018.09.005

12. A novel design methodology for the mixed-domain optimization of a MEMS accelerometer

M. Pak, F.V. Fernández, G. Dündar, Integration, vol. 62, 314-321, 2018.

DOI: 10.1016/j.vlsi.2018.03.018

 

International Conferences

1. A Noise and RTN-Removal Smart Method for the Parameter Extraction of CMOS Aging Compact Models

J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, R Castro-Lopez, E Roca, FV Fernandez, M Nafria. Proc. Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2018.

2. Weighted Time Lag Plot Defect Parameter Extraction and GPU-based BTI Modeling for BTI Variability

V.M. van Santen, J Diaz-Fortuny, H. Amrouch, J Martin-Martinez, R Rodriguez, R Castro-Lopez, E Roca, FV Fernandez, J. Henkel, M Nafria. Proc. IEEE International Reliability Physics Symposium (IRPS), 2018.

3. Automated massive RTN characterization using a transistor array chip

P. Saraza-Canflanca, J Diaz-Fortuny, A. Toro-Frias, R Castro-Lopez, E Roca, J Martin-Martinez, R Rodriguez, M Nafria, FV Fernandez. Proc. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), pp. 29-32, 2018.

4. A Model Parameter Extraction Methodology Including Time-dependent Variability for Circuit Reliability Simulation

J. Diaz-Fortuny, P. Saraza-Canflanca, A. Toro-Frias, R. Castro-Lopez, J. Martin-Martinez, E. Roca, R. Rodriguez, F.V. Fernandez and M. Nafria. Proc. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), pp. 53-56, 2018.

5. CMOS characterization and compact modelling for circuit reliability simulation

J. Diaz Fortuny, J. Martin-Martinez, R. Rodriguez, M. Nafria, R. Castro-Lopez, E. Roca and F.V. Fernandez. Proc. IEEE Int. Symposium on On-Line Testing and Robust System Design IOLTS 2018.

6. Analysis of Body Bias and RTN-induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology

E. Barajas, X. Aragones, D. Mateo, F. Moll, J. Martin-Martinez, R. Rodríguez, M. Portí, M. Nafria, R. Castro-López, E. Roca and F.V Fernández-Fernández. Proc. Int. Symposium on Power and Timing Modeling, Optimization and Simulation PATMOS 2018.

7. Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs

F. Passos, R. Martins, N. Lourenço, E. Roca, R. Castro-López, R. Póvoa, A. Canelas, N. Horta and F.V. Fernández. Proc. 15 th  Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design SMACD 2018.

8. Design considerations of an SRAM array for the statistical validation of time-dependent variability models

P. Saraza-Canflanca, D. Malagon, F. Passos, A. Toro, J. Nuñez, J. Diaz-Fortuny, R. Castro-Lopez, E. Roca, J. Martin-Martinez, R. Rodriguez, M. Nafria and F.V. Fernandez. Proc. 15th Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design SMACD 2018.

9. Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs

A. Toro-Frías, P. Martín-Lloret, J. Martinez, R. Castro-Lopez, E. Roca, R. Rodriguez, M. Nafria and F.V. Fernandez. Proc. 15 th Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design SMACD 2018.

10. Benchmarking of nanometer technologies for DPA-resilient DPL-based cryptocircuits

E. Tena-Sánchez, I.M. Delgado-Lozano, J. Nuñez and A.J. Acosta. Proc. Conference on Design of Circuits and Integrated Systems DCIS 2018.

11. Inverting Versus Non-Inverting Dynamic Logic for Two-Phase Latch-free Nanopipelines

H.J. Quintero, M. Jimenez, M.J. Avedillo and J. Núñez. Proc. Int. Conf. on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design SMACD 2018.