RF/Digital Interfaces managed by
Artificial Neural Networks
It is expected that the number of edge (IoT) devices will reach more than 350 billions in 2030, trending towards the trillion of connections in the next decade. IoT will be empowered by Artificial Intelligence (AI), so that end-terminals can react and make decisions autonomously, without requiring communication with remote servers. AI-managed IoT (AIoT) devices benefit also from the fifth generation (5G) of mobile telecom, reaching up to tens of Gb/s data rates, reduced latency, and real-time interactivity. However, the ultra-large-scale interconnection of AIoT nodes will be conditioned by the physical isolation of (mostly wireless) end-devices, requiring autonomy in terms of access to energy and computational resources. This will make energy harvesting more and more necessary. The amount of energy which can be harvested by battery-less devices depends on the source of energy (solar, thermal, wind, RF, etc), the location of IoT nodes, and the efficiency of energy harvesters and power-management modules.
This project focuses on the design of software-defined Radio-Frequency (RF)/digital interfaces assisted by Artificial Neural Networks (ANNs) for energy-aware AIoT devices. These RF/digital interfaces are made up of an Analog-to-Digital Converter (ADC) in the receiver, and a Digital-to-Analog Converter (DAC) in the transmitter. The target is to digitize a wide spectrum of signals with 8-12-bit resolution within a programmable 30kHz-300MHz bandwidth and a tunable carrier frequency ranging from 0.4GHz to 6GHz. The operation of the circuits are managed by an ANN to identify energy emitted by nearby wireless devices such as mobile phones and Wi-Fi routers and scavenge RF energy according to the information sensed from the electromagnetic environment. Although the project covers aspects related to the whole wireless system, it makes emphasis on the design of AI-assisted energy-aware RF ADCs and DACs integrated in 28-nm FD-SOI CMOS technology from ST Microelectronics. The project will provide efficient chip solutions in diverse applications dealing with wireless AIoT, while targeting specifications which are at the cutting-edge of the state of the art on analog/digital interfaces. The design of the chips will be supported by an ANN-based design methodology and CAD tools to automate and optimize the design of analog and mixed-signal circuits, and very specially ADCs and DACs.
Cognitive Radio Digitizers for IoT Nodes
The so-called Cognitive Radio (CR) technology allows communication systems to make a more efficient use of the electromagnetic spectrum, by dynamically modifying its transmission and reception parameters according to the information sensed from the environment a technique also referred to as spectrum sensing. One of the direct consequences of the physical implementations of CR-based terminals is that the digitizers, i.e the circuits responsible for transforming the signal from the analog to the digital domain, should be placed as close as possible to the antenna, so that most of the hardware is digital and hence, it is easier to program via software. Another key technology enabler for the development of CR-based IoT nodes is the need to embed a certain degree of Artificial Intelligence (AI), so that they can set their specifications in an optimum and autonomous way, according to the environment conditions (communication coverage, spectrum occupancy, interferences), battery status and energy consumption.
Some of these design challenges are addressed in this project, which aims to design AI-managed digitizers for CR-based IoT devices. Although the project covers design considerations of the whole communication system, the physical design will focus on the analog-to-digital converter, as an essential key building block of any electronic device. For the realization of the proposed digitizer, a Band-Pass Sigma-Delta Modulator with tunable notch frequency will be used to convert RF signals into digital data. The circuit will be integrated in a 28-nm technology and a complete demonstrator will be implemented to experimentally validate the circuits and systems techniques proposed in the project.
Design of AI-managed
Cognitive Interfaces for IoT devices
The main objective of this project is the development of AI-assisted design techniques, synthesis methodologies and CAD tools for the automatic and optimum design of analog/digital interfaces. AI-managed analysis and synthesis methods are being investigated – from system- to circuit level. Circuits and systems strategies to increase the degree of programmability are considered, so that the specifications at each level of abstraction can be controlled by AI algorithms implemented on neural networks. Analog-to-digital converters (ADCs) based on Sigma-Delta Modulation are taken as case studies. The AI-based methods and circuit strategies developed in the project are applied to optimize the performance of ADCs integrated in 28-nm CMOS technologies. Two fabrication processes, namely CMOS FDSOI (Fully Depleted Silicon on Insulator) and HK-MG (High-K Metal Gate), are used as verification platforms of the design techniques and EDA tools proposed in this project.
Talks, Courses & Tutorials
Journal Papers
G. Jovanovic Dolecek and J.M. de la Rosa: "Design of Wideband Comb Compensator Based on Magnitude Response Using Two Sinusoidals and Particle Swarm Optimization." Elsevier International Journal of Electronics and Communications (AEUE), 2021. https://doi.org/10.1016/j.aeue.2020.153570.
J. Ahmadi-Farsani, V. Zúñiga-González, T. Serrano-Gotarredona, B. Linares-Barranco and J.M. de la Rosa: “Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits -- Application to Voltage-Controlled Ring Oscillators and Frequency-based Sigma-Delta ADCs.” IEEE Trans. on Circuits and Systems -- I: Regular Papers, October, 2020. DOI: 10.1109/TCSI.2020.2978926.
M. Honarparvar, J.M. de la Rosa, M. Sawan: “A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-based CT MASH Delta-Sigma Modulator.” IEEE Trans. on Circuits and Systems -- II: Express Briefs, vol. 67, September 2020. DOI: 10.1109/TCSII.2020.2998727.