(Under construction)

Grant PID2019-103876RB-I00 funded by the "Ministerio de Ciencia e Innovación", MCIN/AEI/10.13039/501100011033. Grant PRE2020-093852 funded by MCIN/AEI/10.13039/501100011033 and by “ESF Investing in your future”.


Cognitive Radio Digitizers for IoT Nodes

A research project carried out at the Institute of Microelectronics of Seville, IMSE-CNM (CSIC / University of Seville).

Summary & Objectives

The so-called Cognitive Radio (CR) technology allows communication systems to make a more efficient use of the electromagnetic spectrum, by dynamically modifying its transmission and reception parameters according to the information sensed from the environment a technique also referred to as spectrum sensing. One of the direct consequences of the physical implementations of CR-based terminals is that the digitizers, i.e the circuits responsible for transforming the signal from the analog to the digital domain, should be placed as close as possible to the antenna, so that most of the hardware is digital and hence, it is easier to program via software. Another key technology enabler for the development of CR-based IoT nodes is the need to embed a certain degree of Artificial Intelligence (AI), so that they can set their specifications in an optimum and autonomous way, according to the environment conditions (communication coverage, spectrum occupancy, interferences), battery status and energy consumption. 
    Some of these design challenges are addressed in this project, which aims to design AI-managed digitizers for CR-based IoT devices. Although the project covers design considerations of the whole communication system, the physical design will focus on the analog-to-digital converter, as an essential key building block of any electronic device. For the realization of the proposed digitizer, a Band-Pass Sigma-Delta Modulator with tunable notch frequency will be used to convert RF signals into digital data. The circuit will be integrated in a 28-nm technology and a complete demonstrator will be implemented to experimentally validate the circuits and systems techniques proposed in the project.

Grant P20_00599 funded by “Junta de Andalucía (Consejería de Economía, Conocimiento, Empresas y Universidad)”


Design of AI-managed
Cognitive Interfaces for IoT devices 

A research project carried out at the Institute of Microelectronics of Seville, IMSE-CNM (CSIC / University of Seville).

Summary & Objectives

The main objective of this project is the development of AI-assisted design techniques, synthesis methodologies and CAD tools for the automatic and optimum design of analog/digital interfaces. AI-managed analysis and synthesis methods are being investigated – from system- to circuit level. Circuits and systems strategies to increase the degree of programmability are considered, so that the specifications at each level of abstraction can be controlled by AI algorithms implemented on neural networks. Analog-to-digital converters (ADCs) based on Sigma-Delta Modulation are taken as case studies. The AI-based methods and circuit strategies developed in the project are applied to optimize the performance of ADCs integrated in 28-nm CMOS technologies. Two fabrication processes, namely CMOS FDSOI (Fully Depleted Silicon on Insulator) and HK-MG (High-K Metal Gate), are used as verification platforms of the design techniques and EDA tools proposed in this project. 



Talks, Courses & Tutorials

Journal Papers

  • J.M. de la Rosa: “AI-Assisted Sigma-Delta Converters: Application to Cognitive Radio.” IEEE Trans. on Circuits and Systems -- II: Express Briefs, vol. 69, 2022.
    DOI: 10.1109/TCSII.2022.3161717.
  • J.M. de la Rosa: “AI-Managed Cognitive Radio Digitizers.” IEEE Circuits and Systems Magazine. vol. 22, pp. 10-39, First Quarter, 2022. DOI: 10.1109/MCAS.2022.3142669.
  • P.I. Okorie, J. Ahmadi-Farsani  and J.M. de la Rosa: "Reducing the Nonlinearity and Harmonic Distortion in FD-SOI CMOS Current-Starved Inverters and VCROs." Elsevier International J. of Electronics and Communications (AEUE), 2021. https://doi.org/10.1016/j.aeue.2021.153992.
  • C. Mohan, L.A. Camuñas-Mesa, J.M. de la Rosa, E. Vianello, T. Serrano-Gotarredona and B. Linares-Barranco: “Neuromorphic Low-power Inference on Memristive Crossbars with On-chip Offset Calibration.” IEEE Access, January 2021. DOI: 10.1109/ACCESS.2021.3063437.
  •  G. Jovanovic Dolecek and J.M. de la Rosa: "Design of Wideband Comb Compensator Based on Magnitude Response Using Two Sinusoidals and Particle Swarm Optimization." Elsevier International Journal of Electronics and Communications (AEUE), 2021. https://doi.org/10.1016/j.aeue.2020.153570.

  • J. Ahmadi-Farsani, V. Zúñiga-González, T. Serrano-Gotarredona, B. Linares-Barranco and J.M. de la Rosa: “Enhanced Linearity in FD-SOI CMOS Body-Input Analog Circuits -- Application to Voltage-Controlled Ring Oscillators and Frequency-based Sigma-Delta ADCs.” IEEE Trans. on Circuits and Systems -- I: Regular Papers, October, 2020. DOI: 10.1109/TCSI.2020.2978926.

  • M. Honarparvar, J.M. de la Rosa, M. Sawan: “A 10-MHz BW 77.3-dB SNDR 640-MS/s GRO-based CT MASH Delta-Sigma Modulator.” IEEE Trans. on Circuits and Systems -- II: Express Briefs, vol. 67, September 2020. DOI: 10.1109/TCSII.2020.2998727.

Conference Papers

  • H. Aboushady, A. Sayed, L. A. Camuñas-Mesa and J.M. de la Rosa: “Cognitive Radio Circuits and Systems - Application to Digitizers.” Proc. of the 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, May 2021. DOI: 10.1109/ISCAS51556.2021.9401693.
  • C. Mohan, L. Camuñas-Mesa, E. Vianello, C. Reita, J.M. de la Rosa, T. Serrano-Gotarredona, B. Linares-Barranco: “Implementation of binary stochastic STDP learning using chalcogenide-based memristive devices.” Proc. of the 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, May 2021. DOI: 10.1109/ISCAS51556.2021.9401159
  • V. Zúñiga, L. Camuñas-Mesa, B. Linares-Barranco, T. Serrano-Gotarredona, J.M. de la Rosa: “Using Neural Networks for Optimum band selection in Cognitive-Radio Systems.” Proc. of the 2020 IEEE International Conference on Electronics, Circuits & Systems (ICECS), November 2020. DOI: 10.1109/ICECS49266.2020.9294894.
  • G. Jovanovic-Dolecek and J.M. de la Rosa: “Low-Power Compensated Modified Comb Decimation Structure for Power-of-Two Decimation Factors.Proc. of the 2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), February 2021. DOI: 10.1109/LASCAS51355.2021.9459139.
  • G. Jovanovic-Dolecek, L. Camuñas-Mesa and J.M. de la Rosa: “Low Order Wideband Multiplierless Comb Compensator.Proc. of the 2020 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), August 2020. DOI: 10.1109/MWSCAS48704.2020.9184453.