3D integrated circuit technologies
One of the technologies that can help integrating concurrent sensing and processing elements is 3D circuit integration, i. e. vertical stacking of different silicon planes. These planes —called tiers— are interconnected by means of TSVs (through-silicon-vias). 3D integration technologies based on TSVs go beyond flip-chip bonding [33]. They permit the implementation of lighter and more compact systems, solving the difficulties found in large area multi-chip modules (MCM). TSVs reduce signal propagation distances from millimeters to micrometers, therefore reducing the amount of power required to transmit those signals. Nowadays techniques for 3D silicon chip stacking [34] reach a minimum pitch of 3um. In about 2 to 4 years, these technologies will be ready for reliable IC design and production [35]. 3D circuit integration offers a larger packing density and a larger bandwidth for in-package communications. However, it introduce new challenges in power dissipation and thermal management of the system. Despite all fabrication difficulties and the associated challenges, companies like Samsung, Toshiba or Xilinx have already started the design of memory products to be available in 2013 [36]. Concerning CMOS image sensors, chips with parallel sensor and electronic readout layers are already being released [37], [38]. There are some experimental prototypes incorporating processing elements [39]. In the field of consumer electronics, Sony has announced their intention to fabricate image sensors based on 3D IC technologies [40].
For the integration of a complete vision system on-a-chip, 3D IC technologies constitute a very promising alternative. It permits naturally distributing sensory and processing circuitry in several tiers. Fill-factor can be increased to approach the ideal 100%. The image size can also be larger, as pixels are more compact. Beside the obvious challenges associated to the appropriate partitioning of the circuitry between layers and domains —analog and digital— the transition from conventional to 3D technologies will lead to new photo-sensitive structures. We may find the need to back-illuminate the sensors through the wafer (BSI: back-side illuminated sensors) instead of using the front-side (FSI: front-side illuminated sensors). Although there exist commercial products using BSI technology already (Omnivision [41]), still remains a challenge to study the response of these structures in concurrently capturing 2D and 3D information.